385 lines
7.9 KiB
Plaintext
385 lines
7.9 KiB
Plaintext
/*
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* Copyright (c) 2019 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/clock/kinetis_scg.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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aliases {
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rtc-0 = &rtc0;
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wdt-0 = &wdog0;
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uart-0 = &uart0;
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uart-1 = &uart1;
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uart-2 = &uart2;
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i2c-0 = &i2c0;
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i2c-1 = &i2c1;
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spi-0 = &spi0;
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spi-1 = &spi1;
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pinmux-a = &pinmux_a;
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pinmux-b = &pinmux_b;
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pinmux-c = &pinmux_c;
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pinmux-d = &pinmux_d;
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pinmux-e = &pinmux_e;
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gpio-a = &gpioa;
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gpio-b = &gpiob;
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gpio-c = &gpioc;
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gpio-d = &gpiod;
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gpio-e = &gpioe;
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adc-0 = &adc0;
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adc-1 = &adc1;
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adc-2 = &adc2;
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ftm-0 = &ftm0;
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ftm-1 = &ftm1;
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ftm-2 = &ftm2;
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ftm-3 = &ftm3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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soc {
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mpu: mpu@4000d000 {
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compatible = "nxp,kinetis-mpu";
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reg = <0x4000d000 0x1000>;
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status = "disabled";
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};
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sim: sim@40048000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40048000 0x1000>;
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label = "SIM";
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};
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scg: scg@40064000 {
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compatible = "nxp,kinetis-scg";
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reg = <0x40064000 0x1000>;
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label = "SCG";
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#clock-cells = <1>;
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};
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pmc: pmc@4007d000 {
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compatible = "fixed-clock";
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reg = <0x4007d000 0x1000>;
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label = "PMC";
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/* LPO clock */
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clock-frequency = <125000>;
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#clock-cells = <0>;
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};
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pcc: pcc@40065000 {
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compatible = "nxp,kinetis-pcc";
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reg = <0x40065000 0x1000>;
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label = "PCC";
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#clock-cells = <1>;
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};
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rtc0: rtc@4003d000 {
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compatible = "nxp,kinetis-rtc";
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reg = <0x4003d000 0x1000>;
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interrupts = <46 0>, <47 0>;
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interrupt-names = "alarm", "seconds";
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clock-frequency = <32768>;
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prescaler = <32768>;
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label = "RTC_0";
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};
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wdog0: watchdog@40052000 {
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compatible = "nxp,kinetis-wdog32";
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reg = <0x40052000 0x1000>;
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interrupts = <22 0>;
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clocks = <&pmc>;
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clk-source = <1>;
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clk-divider = <256>;
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label = "WDT_0";
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};
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flash_controller: flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfe";
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label = "FLASH_CTRL";
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reg = <0x40020000 0x1000>;
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interrupts = <18 0>, <19 0>;
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interrupt-names = "command-complete", "read-collision";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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uart0: uart@4006a000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006a000 0x1000>;
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interrupts = <31 0>, <32 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1a8>;
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label = "UART_0";
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status = "disabled";
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};
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uart1: uart@4006b000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006b000 0x1000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1ac>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: uart@4006c000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006c000 0x1000>;
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interrupts = <35 0>, <36 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1b0>;
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label = "UART_2";
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status = "disabled";
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <24 0>;
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clocks = <&pcc 0x198>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <25 0>;
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clocks = <&pcc 0x19c>;
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label = "I2C_1";
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status = "disabled";
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};
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spi0: spi@4002c000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <26 0>;
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clocks = <&pcc 0xb0>;
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label = "SPI_0";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi1: spi@4002d000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x4002d000 0x1000>;
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interrupts = <27 0>;
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clocks = <&pcc 0xb4>;
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label = "SPI_1";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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can0: can@40024000 {
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compatible = "nxp,kinetis-flexcan";
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reg = <0x40024000 0x1000>;
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interrupts = <78 0>, <79 0>, <80 0>, <81 0>;
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interrupt-names = "warning", "error", "wake-up",
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"mb-0-15";
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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clk-source = <1>;
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label = "CAN_0";
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sjw = <1>;
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prop-seg = <1>;
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phase-seg1 = <3>;
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phase-seg2 = <2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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can1: can@40025000 {
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compatible = "nxp,kinetis-flexcan";
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reg = <0x40025000 0x1000>;
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interrupts = <85 0>, <86 0>, <87 0>, <88 0>;
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interrupt-names = "warning", "error", "wake-up",
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"mb-0-15";
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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clk-source = <1>;
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label = "CAN_1";
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sjw = <1>;
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prop-seg = <1>;
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phase-seg1 = <3>;
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phase-seg2 = <2>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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pinmux_a: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0x1000>;
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clocks = <&pcc 0x124>;
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};
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pinmux_b: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0x1000>;
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clocks = <&pcc 0x128>;
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};
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pinmux_c: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0x1000>;
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clocks = <&pcc 0x12c>;
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};
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pinmux_d: pinmux@4004c000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004c000 0x1000>;
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clocks = <&pcc 0x130>;
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};
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pinmux_e: pinmux@4004d000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004d000 0x1000>;
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clocks = <&pcc 0x134>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff000 0x40>;
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interrupts = <59 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff040 0x40>;
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interrupts = <60 2>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff080 0x40>;
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interrupts = <61 2>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff0c0 0x40>;
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interrupts = <62 2>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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reg = <0x400ff100 0x40>;
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interrupts = <63 2>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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};
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adc0: adc@4003b000 {
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compatible = "nxp,kinetis-adc12";
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reg = <0x4003b000 0x1000>;
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interrupts = <39 0>;
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clocks = <&pcc 0xec>;
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label = "ADC_0";
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clk-source = <0>;
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clk-divider = <1>;
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status = "disabled";
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};
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adc1: adc@40027000 {
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compatible = "nxp,kinetis-adc12";
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reg = <0x40027000 0x1000>;
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interrupts = <73 0>;
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clocks = <&pcc 0x9c>;
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label = "ADC_1";
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clk-source = <0>;
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clk-divider = <1>;
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status = "disabled";
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};
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adc2: adc@4003c000 {
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compatible = "nxp,kinetis-adc12";
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reg = <0x4003c000 0x1000>;
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interrupts = <74 0>;
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clocks = <&pcc 0xf0>;
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label = "ADC_2";
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clk-source = <0>;
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clk-divider = <1>;
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status = "disabled";
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};
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ftm0: pwm@40038000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40038000 0x1000>;
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interrupts = <42 0>;
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clocks = <&pcc 0xe0>;
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label = "FTM_0";
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#pwm-cells = <2>;
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status = "disabled";
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};
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ftm1: pwm@40039000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40039000 0x1000>;
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interrupts = <43 0>;
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clocks = <&pcc 0xe4>;
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label = "FTM_1";
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#pwm-cells = <2>;
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status = "disabled";
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};
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ftm2: pwm@4003a000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x4003a000 0x1000>;
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interrupts = <44 0>;
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clocks = <&pcc 0xe8>;
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label = "FTM_2";
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#pwm-cells = <2>;
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status = "disabled";
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};
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ftm3: pwm@40026000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40026000 0x1000>;
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interrupts = <71 0>;
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clocks = <&pcc 0x98>;
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label = "FTM_3";
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#pwm-cells = <2>;
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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