2346e318d3
Adds a second sram node to the k64 device tree to acknowledge that the additional sram is present in hardware, but deliberately not used in zephyr until an outstanding issue is solved. The upper and lower sram nodes are contiguous in the memory map, however the Cortex-M4 architecture does not support misaligned accesses across the boundary between the two nodes. Signed-off-by: Maureen Helm <maureen.helm@nxp.com> |
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| .. | ||
| nxp_imx6sx_m4.dtsi | ||
| nxp_imx7d_m4.dtsi | ||
| nxp_k6x.dtsi | ||
| nxp_kl25z.dtsi | ||
| nxp_kw2xd.dtsi | ||
| nxp_kw40z.dtsi | ||
| nxp_kw41z.dtsi | ||
| nxp_lpc54xxx.dtsi | ||
| nxp_lpc54xxx_m0.dtsi | ||
| nxp_lpc54xxx_m4.dtsi | ||
| nxp_rt.dtsi | ||