471 lines
14 KiB
Plaintext
471 lines
14 KiB
Plaintext
/*
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* Copyright (c) 2016 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for the intel_s1000_crb platform
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*/
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OUTPUT_ARCH(xtensa)
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#define _LINKER
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#define _ASMLANGUAGE
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#include <generated_dts_board.h>
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#include "memory.h"
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#include <autoconf.h>
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#include <linker/sections.h>
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#include <linker/linker-defs.h>
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#include <linker/linker-tool.h>
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#define RAMABLE_REGION data :data_phdr
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#define ROMABLE_REGION text :text_phdr
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MEMORY
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{
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vector_reset_text :
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org = XCHAL_RESET_VECTOR0_PADDR_SRAM,
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len = MEM_RESET_TEXT_SIZE
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vector_reset_lit :
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org = XCHAL_RESET_VECTOR0_PADDR_SRAM + MEM_RESET_TEXT_SIZE,
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len = MEM_RESET_LIT_SIZE
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vector_memory_lit :
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org = XCHAL_MEMERROR_VECTOR_PADDR + MEM_ERROR_LIT_SIZE,
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len = MEM_ERROR_LIT_SIZE
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vector_memory_text :
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org = XCHAL_MEMERROR_VECTOR_PADDR,
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len = MEM_ERROR_TEXT_SIZE
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vector_base_text :
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org = XCHAL_VECBASE_RESET_PADDR_SRAM,
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len = MEM_VECBASE_LIT_SIZE
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vector_int2_lit :
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org = XCHAL_INTLEVEL2_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int2_text :
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org = XCHAL_INTLEVEL2_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_int3_lit :
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org = XCHAL_INTLEVEL3_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int3_text :
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org = XCHAL_INTLEVEL3_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_int4_lit :
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org = XCHAL_INTLEVEL4_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int4_text :
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org = XCHAL_INTLEVEL4_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_int5_lit :
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org = XCHAL_INTLEVEL5_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int5_text :
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org = XCHAL_INTLEVEL5_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_int6_lit :
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org = XCHAL_INTLEVEL6_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int6_text :
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org = XCHAL_INTLEVEL6_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_int7_lit :
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org = XCHAL_INTLEVEL7_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_int7_text :
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org = XCHAL_INTLEVEL7_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_kernel_lit :
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org = XCHAL_KERNEL_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_kernel_text :
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org = XCHAL_KERNEL_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_user_lit :
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org = XCHAL_USER_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_user_text :
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org = XCHAL_USER_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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vector_double_lit :
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org = XCHAL_DOUBLEEXC_VECTOR_PADDR_SRAM - MEM_VECT_LIT_SIZE,
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len = MEM_VECT_LIT_SIZE
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vector_double_text :
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org = XCHAL_DOUBLEEXC_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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text :
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org = TEXT_BASE,
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len = TEXT_SIZE,
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#ifdef CONFIG_GEN_ISR_TABLES
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IDT_LIST :
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org = TEXT_BASE + TEXT_SIZE,
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len = IDT_SIZE,
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#endif
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data :
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org = TEXT_BASE + TEXT_SIZE + IDT_SIZE,
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len = DATA_SIZE
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bss_data :
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org = TEXT_BASE + TEXT_SIZE + IDT_SIZE + DATA_SIZE,
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len = BSS_DATA_SIZE
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}
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PHDRS
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{
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vector_reset_text_phdr PT_LOAD;
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vector_reset_lit_phdr PT_LOAD;
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vector_memory_lit_phdr PT_LOAD;
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vector_memory_text_phdr PT_LOAD;
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vector_base_text_phdr PT_LOAD;
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vector_int2_lit_phdr PT_LOAD;
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vector_int2_text_phdr PT_LOAD;
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vector_int3_lit_phdr PT_LOAD;
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vector_int3_text_phdr PT_LOAD;
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vector_int4_lit_phdr PT_LOAD;
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vector_int4_text_phdr PT_LOAD;
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vector_int5_lit_phdr PT_LOAD;
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vector_int5_text_phdr PT_LOAD;
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vector_int6_lit_phdr PT_LOAD;
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vector_int6_text_phdr PT_LOAD;
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vector_int7_lit_phdr PT_LOAD;
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vector_int7_text_phdr PT_LOAD;
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vector_kernel_lit_phdr PT_LOAD;
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vector_kernel_text_phdr PT_LOAD;
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vector_user_lit_phdr PT_LOAD;
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vector_user_text_phdr PT_LOAD;
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vector_double_lit_phdr PT_LOAD;
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vector_double_text_phdr PT_LOAD;
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text_phdr PT_LOAD;
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data_phdr PT_LOAD;
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bss_data_phdr PT_LOAD;
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}
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_rom_store_table = 0;
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PROVIDE(_memmap_vecbase_reset = XCHAL_VECBASE_RESET_PADDR_SRAM);
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ENTRY(CONFIG_KERNEL_ENTRY)
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x44024000;
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_memmap_cacheattr_wt_base = 0x11021000;
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_memmap_cacheattr_bp_base = 0x22022000;
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_memmap_cacheattr_unused_mask = 0x00F00FFF;
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_memmap_cacheattr_wb_trapnull = 0x4422422F;
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_memmap_cacheattr_wba_trapnull = 0x4422422F;
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_memmap_cacheattr_wbna_trapnull = 0x25222222;
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_memmap_cacheattr_wt_trapnull = 0x1122122F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0x44F24FFF;
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_memmap_cacheattr_wt_strict = 0x11F21FFF;
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_memmap_cacheattr_bp_strict = 0x22F22FFF;
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_memmap_cacheattr_wb_allvalid = 0x44224222;
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_memmap_cacheattr_wt_allvalid = 0x11221222;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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_memmap_cacheattr_intel_s1000 = 0xf2ff4242;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_intel_s1000);
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SECTIONS
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{
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.ResetVector.text : ALIGN(4)
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{
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_ResetVector_text_start = ABSOLUTE(.);
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KEEP (*(.ResetVector.text))
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_ResetVector_text_end = ABSOLUTE(.);
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} >vector_reset_text :vector_reset_text_phdr
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.ResetVector.literal : ALIGN(4)
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{
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_ResetVector_literal_start = ABSOLUTE(.);
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*(.ResetVector.literal)
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_ResetVector_literal_end = ABSOLUTE(.);
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} >vector_reset_lit :vector_reset_lit_phdr
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.MemoryExceptionVector.literal : ALIGN(4)
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{
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_MemoryExceptionVector_literal_start = ABSOLUTE(.);
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KEEP (*(.MemoryExceptionVector.literal))
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_MemoryExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_memory_lit :vector_memory_lit_phdr
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.MemoryExceptionVector.text : ALIGN(4)
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{
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_MemoryExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.MemoryExceptionVector.text))
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_MemoryExceptionVector_text_end = ABSOLUTE(.);
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} >vector_memory_text :vector_memory_text_phdr
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.WindowVectors.text : ALIGN(4)
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{
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_WindowVectors_text_start = ABSOLUTE(.);
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KEEP (*(.WindowVectors.text))
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_WindowVectors_text_end = ABSOLUTE(.);
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} >vector_base_text :vector_base_text_phdr
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.Level2InterruptVector.literal : ALIGN(4)
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{
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_Level2InterruptVector_literal_start = ABSOLUTE(.);
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*(.Level2InterruptVector.literal)
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_Level2InterruptVector_literal_end = ABSOLUTE(.);
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} >vector_int2_lit :vector_int2_lit_phdr
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.Level2InterruptVector.text : ALIGN(4)
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{
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_Level2InterruptVector_text_start = ABSOLUTE(.);
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KEEP (*(.Level2InterruptVector.text))
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_Level2InterruptVector_text_end = ABSOLUTE(.);
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} >vector_int2_text :vector_int2_text_phdr
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.Level3InterruptVector.literal : ALIGN(4)
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{
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_Level3InterruptVector_literal_start = ABSOLUTE(.);
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*(.Level3InterruptVector.literal)
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_Level3InterruptVector_literal_end = ABSOLUTE(.);
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} >vector_int3_lit :vector_int3_lit_phdr
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.Level3InterruptVector.text : ALIGN(4)
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{
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_Level3InterruptVector_text_start = ABSOLUTE(.);
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KEEP (*(.Level3InterruptVector.text))
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_Level3InterruptVector_text_end = ABSOLUTE(.);
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} >vector_int3_text :vector_int3_text_phdr
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.Level4InterruptVector.literal : ALIGN(4)
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{
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_Level4InterruptVector_literal_start = ABSOLUTE(.);
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*(.Level4InterruptVector.literal)
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_Level4InterruptVector_literal_end = ABSOLUTE(.);
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} >vector_int4_lit :vector_int4_lit_phdr
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.Level4InterruptVector.text : ALIGN(4)
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{
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_Level4InterruptVector_text_start = ABSOLUTE(.);
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KEEP (*(.Level4InterruptVector.text))
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_Level4InterruptVector_text_end = ABSOLUTE(.);
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} >vector_int4_text :vector_int4_text_phdr
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.Level5InterruptVector.literal : ALIGN(4)
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{
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_Level5InterruptVector_literal_start = ABSOLUTE(.);
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*(.Level5InterruptVector.literal)
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_Level5InterruptVector_literal_end = ABSOLUTE(.);
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} >vector_int5_lit :vector_int5_lit_phdr
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.Level5InterruptVector.text : ALIGN(4)
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{
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_Level5InterruptVector_text_start = ABSOLUTE(.);
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KEEP (*(.Level5InterruptVector.text))
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_Level5InterruptVector_text_end = ABSOLUTE(.);
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} >vector_int5_text :vector_int5_text_phdr
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.DebugExceptionVector.literal : ALIGN(4)
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{
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_DebugExceptionVector_literal_start = ABSOLUTE(.);
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*(.DebugExceptionVector.literal)
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_DebugExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_int6_lit :vector_int6_lit_phdr
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.DebugExceptionVector.text : ALIGN(4)
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{
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_DebugExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.DebugExceptionVector.text))
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_DebugExceptionVector_text_end = ABSOLUTE(.);
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} >vector_int6_text :vector_int6_text_phdr
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.NMIExceptionVector.literal : ALIGN(4)
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{
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_NMIExceptionVector_literal_start = ABSOLUTE(.);
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*(.NMIExceptionVector.literal)
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_NMIExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_int7_lit :vector_int7_lit_phdr
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.NMIExceptionVector.text : ALIGN(4)
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{
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_NMIExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.NMIExceptionVector.text))
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_NMIExceptionVector_text_end = ABSOLUTE(.);
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} >vector_int7_text :vector_int7_text_phdr
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.KernelExceptionVector.literal : ALIGN(4)
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{
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_KernelExceptionVector_literal_start = ABSOLUTE(.);
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*(.KernelExceptionVector.literal)
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_KernelExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_kernel_lit :vector_kernel_lit_phdr
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.KernelExceptionVector.text : ALIGN(4)
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{
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_KernelExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.KernelExceptionVector.text))
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_KernelExceptionVector_text_end = ABSOLUTE(.);
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} >vector_kernel_text :vector_kernel_text_phdr
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.UserExceptionVector.literal : ALIGN(4)
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{
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_UserExceptionVector_literal_start = ABSOLUTE(.);
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*(.UserExceptionVector.literal)
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_UserExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_user_lit :vector_user_lit_phdr
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.UserExceptionVector.text : ALIGN(4)
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{
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_UserExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.UserExceptionVector.text))
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_UserExceptionVector_text_end = ABSOLUTE(.);
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} >vector_user_text :vector_user_text_phdr
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.DoubleExceptionVector.literal : ALIGN(4)
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{
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_DoubleExceptionVector_literal_start = ABSOLUTE(.);
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*(.DoubleExceptionVector.literal)
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_DoubleExceptionVector_literal_end = ABSOLUTE(.);
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} >vector_double_lit :vector_double_lit_phdr
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.DoubleExceptionVector.text : ALIGN(4)
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{
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_DoubleExceptionVector_text_start = ABSOLUTE(.);
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KEEP (*(.DoubleExceptionVector.text))
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_DoubleExceptionVector_text_end = ABSOLUTE(.);
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} >vector_double_text :vector_double_text_phdr
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.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.entry.text)
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*(.init.literal)
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KEEP(*(.init))
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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KEEP(*(.fini))
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} >text :text_phdr
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#include <linker/common-rom.ld>
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.noinit : ALIGN(4)
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{
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*(.noinit)
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*(.noinit.*)
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} >data :data_phdr
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.rodata : ALIGN(4)
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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KEEP (*(.xt_except_table))
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KEEP (*(.gcc_except_table))
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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KEEP (*(.eh_frame))
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4);
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_bss_table_start = ABSOLUTE(.);
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LONG(_bss_start)
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LONG(_bss_end)
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_bss_table_end = ABSOLUTE(.);
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_rodata_end = ABSOLUTE(.);
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} >data :data_phdr
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.data : ALIGN(4)
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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KEEP(*(SW_ISR_TABLE))
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|
*(.gnu.linkonce.d.*)
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KEEP(*(.gnu.linkonce.d.*personality*))
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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|
*(.gnu.linkonce.s.*)
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|
*(.sdata2)
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|
*(.sdata2.*)
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|
*(.gnu.linkonce.s2.*)
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|
KEEP(*(.jcr))
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|
_data_end = ABSOLUTE(.);
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|
} >data :data_phdr
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|
.lit4 : ALIGN(4)
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|
{
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|
_lit4_start = ABSOLUTE(.);
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|
*(*.lit4)
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|
*(.lit4.*)
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|
*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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|
} >data :data_phdr
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|
#include <linker/common-ram.ld>
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.bss (NOLOAD) : ALIGN(8)
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|
{
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|
. = ALIGN (8);
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|
_bss_start = ABSOLUTE(.);
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|
*(.dynsbss)
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|
*(.sbss)
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*(.sbss.*)
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|
*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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|
*(.sbss2.*)
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|
*(.gnu.linkonce.sb2.*)
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|
*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} >bss_data :bss_data_phdr
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/* stack */
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_end = ALIGN(8);
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PROVIDE(end = ALIGN(8));
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__stack = L2_SRAM_BASE + L2_SRAM_SIZE;
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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|
.debug_aranges 0 : { *(.debug_aranges) }
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|
.debug_pubnames 0 : { *(.debug_pubnames) }
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|
.debug_info 0 : { *(.debug_info) }
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|
.debug_abbrev 0 : { *(.debug_abbrev) }
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|
.debug_line 0 : { *(.debug_line) }
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|
.debug_frame 0 : { *(.debug_frame) }
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|
.debug_str 0 : { *(.debug_str) }
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|
.debug_loc 0 : { *(.debug_loc) }
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|
.debug_macinfo 0 : { *(.debug_macinfo) }
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|
.debug_weaknames 0 : { *(.debug_weaknames) }
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|
.debug_funcnames 0 : { *(.debug_funcnames) }
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|
.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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.xt.insn 0 :
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|
{
|
|
KEEP (*(.xt.insn))
|
|
KEEP (*(.gnu.linkonce.x.*))
|
|
}
|
|
.xt.prop 0 :
|
|
{
|
|
KEEP (*(.xt.prop))
|
|
KEEP (*(.xt.prop.*))
|
|
KEEP (*(.gnu.linkonce.prop.*))
|
|
}
|
|
.xt.lit 0 :
|
|
{
|
|
KEEP (*(.xt.lit))
|
|
KEEP (*(.xt.lit.*))
|
|
KEEP (*(.gnu.linkonce.p.*))
|
|
}
|
|
.xt.profile_range 0 :
|
|
{
|
|
KEEP (*(.xt.profile_range))
|
|
KEEP (*(.gnu.linkonce.profile_range.*))
|
|
}
|
|
.xt.profile_ranges 0 :
|
|
{
|
|
KEEP (*(.xt.profile_ranges))
|
|
KEEP (*(.gnu.linkonce.xt.profile_ranges.*))
|
|
}
|
|
.xt.profile_files 0 :
|
|
{
|
|
KEEP (*(.xt.profile_files))
|
|
KEEP (*(.gnu.linkonce.xt.profile_files.*))
|
|
}
|
|
#ifdef CONFIG_GEN_ISR_TABLES
|
|
#include <linker/intlist.ld>
|
|
#endif
|
|
}
|