403 lines
8.8 KiB
Plaintext
403 lines
8.8 KiB
Plaintext
/*
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* Copyright (c) 2019 SEAL AG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/clock/kinetis_mcg.h>
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#include <dt-bindings/clock/kinetis_sim.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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aliases {
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adc-0 = &adc0;
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i2c-0 = &i2c0;
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i2c-1 = &i2c1;
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i2c-2 = &i2c2;
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i2c-3 = &i2c3;
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pinmux-a = &porta;
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pinmux-b = &portb;
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pinmux-c = &portc;
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pinmux-d = &portd;
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pinmux-e = &porte;
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spi-0 = &spi0;
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spi-1 = &spi1;
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spi-2 = &spi2;
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uart-0 = &lpuart0;
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uart-1 = &lpuart1;
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uart-2 = &lpuart2;
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uart-3 = &lpuart3;
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uart-4 = &lpuart4;
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usbd-0 = &usbotg;
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watchdog0 = &wdog;
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};
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chosen {
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zephyr,entropy = &trng;
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zephyr,flash-controller = &ftfa;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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};
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};
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soc {
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mpu: mpu@4000d000 {
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compatible = "nxp,kinetis-mpu";
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reg = <0x4000d000 0x1000>;
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status = "disabled";
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};
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sim: sim@40047000 {
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compatible = "nxp,kinetis-sim";
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reg = <0x40047000 0x2000>;
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label = "SIM";
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#clock-cells = <3>;
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};
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mcg: clock-controller@40064000 {
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compatible = "nxp,kinetis-mcg";
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reg = <0x40064000 0x1000>;
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label = "MCG";
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#clock-cells = <1>;
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};
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osc: clock-controller@40065000 {
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compatible = "nxp,k8x-osc";
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reg = <0x40065000 0x4>;
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enable-external-reference;
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};
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ftfa: flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfa";
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label = "FLASH_CTRL";
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reg = <0x40020000 0x1000>;
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interrupts = <18 0>, <19 0>;
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interrupt-names = "command-complete", "read-collision";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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adc0: adc@4003b000 {
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compatible = "nxp,kinetis-adc16";
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reg = <0x4003b000 0x1000>;
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interrupts = <39 0>;
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label = "ADC_0";
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status = "disabled";
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#io-channel-cells = <1>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff000 0x40>;
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interrupts = <59 2>;
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label = "GPIO_0";
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porta>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff040 0x40>;
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interrupts = <60 2>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portb>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff080 0x40>;
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interrupts = <61 2>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portc>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff0c0 0x40>;
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interrupts = <62 2>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portd>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff100 0x40>;
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interrupts = <63 2>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porte>;
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};
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i2c0: i2c@40066000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <24 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
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label = "I2C_0";
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status = "disabled";
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};
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i2c1: i2c@40067000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <25 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
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label = "I2C_1";
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status = "disabled";
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};
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i2c2: i2c@400e6000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400e6000 0x1000>;
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interrupts = <74 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 6>;
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label = "I2C_2";
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status = "disabled";
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};
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i2c3: i2c@400e7000 {
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compatible = "nxp,kinetis-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x400e7000 0x1000>;
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interrupts = <91 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 7>;
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label = "I2C_3";
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status = "disabled";
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};
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lpuart0: lpuart@400c4000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x400c4000 0x1000>;
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interrupts = <30 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 4>;
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label = "UART_0";
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status = "disabled";
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};
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lpuart1: lpuart@400c5000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x400c5000 0x1000>;
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interrupts = <31 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 5>;
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label = "UART_1";
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status = "disabled";
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};
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lpuart2: lpuart@400c6000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x400c6000 0x1000>;
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interrupts = <32 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 6>;
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label = "UART_2";
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status = "disabled";
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};
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lpuart3: lpuart@400c7000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x400c7000 0x1000>;
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interrupts = <33 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 7>;
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label = "UART_3";
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status = "disabled";
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};
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lpuart4: lpuart@400d6000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x400d6000 0x1000>;
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interrupts = <34 0>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 22>;
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label = "UART_4";
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status = "disabled";
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};
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porta: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
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};
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portb: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
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};
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portc: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
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};
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portd: pinmux@4004c000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004c000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
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};
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porte: pinmux@4004d000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004d000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
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};
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ftm0: ftm@40038000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40038000 0x1000>;
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interrupts = <42 0>;
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clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
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prescaler = <16>;
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label = "FTM_0";
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status = "disabled";
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};
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ftm1: ftm@40039000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x40039000 0x1000>;
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interrupts = <43 0>;
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clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
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prescaler = <16>;
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label = "FTM_1";
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status = "disabled";
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};
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ftm2: ftm@4003a000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x4003a000 0x1000>;
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interrupts = <44 0>;
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clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
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prescaler = <16>;
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label = "FTM_2";
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status = "disabled";
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};
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ftm3: ftm@400b9000 {
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compatible = "nxp,kinetis-ftm";
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reg = <0x400b9000 0x1000>;
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interrupts = <71 0>;
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clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>;
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prescaler = <16>;
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label = "FTM_3";
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status = "disabled";
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};
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rtc: rtc@4003d000 {
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compatible = "nxp,kinetis-rtc";
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reg = <0x4003d000 0x1000>;
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interrupts = <46 0>, <47 0>;
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interrupt-names = "alarm", "seconds";
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clock-frequency = <32768>;
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prescaler = <32768>;
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label = "RTC_0";
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};
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spi0: spi@4002c000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <26 3>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 12>;
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label = "SPI_0";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi1: spi@4002d000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x4002d000 0x1000>;
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interrupts = <27 3>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 13>;
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label = "SPI_1";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi2: spi@400ac000 {
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compatible = "nxp,kinetis-dspi";
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reg = <0x400ac000 0x1000>;
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interrupts = <65 3>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x1030 12>;
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label = "SPI_2";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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trng: random@400a0000 {
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compatible = "nxp,kinetis-trng";
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reg = <0x400a0000 0x1000>;
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interrupts = <23 0>;
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label = "TRNG";
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};
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usbotg: usbd@40072000 {
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compatible = "nxp,kinetis-usbd";
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reg = <0x40072000 0x1000>;
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interrupts = <53 1>;
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interrupt-names = "usb_otg";
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num-bidir-endpoints = <16>;
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status = "disabled";
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label = "USBD";
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};
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wdog: watchdog@40052000 {
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compatible = "nxp,kinetis-wdog";
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reg = <0x40052000 0x1000>;
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interrupts = <22 0>;
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clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>;
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label = "WDT_0";
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};
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pit0: pit@40037000 {
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compatible = "nxp,kinetis-pit";
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reg = <0x40037000 0x1000>;
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clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 23>;
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interrupts = <48 0>, <49 0>, <50 0>, <51 0>;
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status = "disabled";
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pit-channel = <0>;
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pit-period = <1000000>;
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clock-frequency = <60000000>;
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label = "PIT0";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <4>;
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};
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