35 lines
1.4 KiB
C
35 lines
1.4 KiB
C
/*
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* Copyright (c) 2019 Song Qiang <songqiang1304521@gmail.com>
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* Copyright (c) 2020 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_
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/* macros for channel-config */
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/* direction defined on bits 6-7 */
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/* 0 -> MEM_TO_MEM, 1 -> MEM_TO_PERIPH, 2 -> PERIPH_TO_MEM */
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#define STM32_DMA_CONFIG_DIRECTION(config) ((config >> 6) & 0x3)
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/* periph increment defined on bit 9 as true/false */
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#define STM32_DMA_CONFIG_PERIPHERAL_ADDR_INC(config) ((config >> 9) & 0x1)
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/* mem increment defined on bit 10 as true/false */
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#define STM32_DMA_CONFIG_MEMORY_ADDR_INC(config) ((config >> 10) & 0x1)
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/* perih data size defined on bits 11-12 */
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/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
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#define STM32_DMA_CONFIG_PERIPHERAL_DATA_SIZE(config) \
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(1 << ((config >> 11) & 0x3))
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/* memory data size defined on bits 13, 14 */
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/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
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#define STM32_DMA_CONFIG_MEMORY_DATA_SIZE(config) \
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(1 << ((config >> 13) & 0x3))
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/* priority increment offset defined on bit 15 */
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#define STM32_DMA_CONFIG_PERIPHERAL_INC_FIXED(config) ((config >> 15) & 0x1)
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/* priority defined on bits 16-17 as 0, 1, 2, 3 */
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#define STM32_DMA_CONFIG_PRIORITY(config) ((config >> 16) & 0x3)
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/* macros for features */
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#define STM32_DMA_FEATURES_FIFO_THRESHOLD(features) (features & 0x3)
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_ */
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