3aeefd2250
Existing solutions for linking the Xtensa vector table are a cut-and-paste mess of inherited code, with more than a dozen special sections that need to be linked into many special MEMORY{} regions. Accept the existing convention used by C/asm code, but automatically detect the needed offsets for the platform from core-isa.h (it can share the preprocessing with gen_zsr.py) and emit a file that can be included in lieu of all the existing boilerplate. Signed-off-by: Andy Ross <andyross@google.com> |
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core | ||
include | ||
CMakeLists.txt | ||
Kconfig |