47 lines
1.2 KiB
YAML
47 lines
1.2 KiB
YAML
# Copyright (c) 2022 Antmicro <www.antmicro.com>
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# SPDX-License-Identifier: Apache-2.0
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description: |
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SiFive FE310 IO Function (iof) binding covers the IOF_EN/IOF_SEL registers
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that are a subset of the GPIO controller. You can use this node to set the
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value of IOF_EN/IOF_SEL registers to control pin settings.
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Device pin configuration should be placed in the child nodes of this node.
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Populate the 'pinmux' field with a pair consisting of a pin number and its IO
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function. The available IO functions are:
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- SIFIVE_PINMUX_IOF0
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- SIFIVE_PINMUX_IOF1
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For example, setting pins 16 and 17 both to IOF0 would look like this:
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#include <dt-bindings/pinctrl/sifive-pinctrl.h>
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&pinctrl {
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uart0_rx_default: uart0_rx_default {
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pinmux = <16 SIFIVE_PINMUX_IOF0>;
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};
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uart0_tx_default: uart0_tx_default {
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pinmux = <17 SIFIVE_PINMUX_IOF0>;
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};
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};
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compatible: "sifive,pinctrl"
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include: base.yaml
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properties:
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reg:
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required: true
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child-binding:
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description: |
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This binding gives a base representation of the SiFive FE310 pins
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configuration.
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properties:
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pinmux:
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required: true
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type: array
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description: |
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SiFive FE310 pin's configuration (pin, IO function).
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