61 lines
1.8 KiB
YAML
61 lines
1.8 KiB
YAML
# Copyright (c) 2022 SEAL AG
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Nuvoton NuMicro pinctrl node. This node will define pin configurations in pin groups,
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and has the 'pinctrl' node identifier in the SOC's devicetree. Each group
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within the pin configuration defines the pin configuration for a peripheral,
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and each numbered subgroup in the pin group defines all the pins for that
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peripheral with the same configuration properties. The 'pinmux' property in
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a group selects the pins to be configured, and the remaining properties set
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configuration values for those pins. Here is an example group for UART0 pins:
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uart0_default: uart0_default {
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group0 {
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pinmux = <UART0_RXD_PB12>, <UART0_TXD_PB13>;
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};
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};
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compatible: "nuvoton,numicro-pinctrl"
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include: base.yaml
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properties:
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reg:
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required: true
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child-binding:
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description: NuMicro pin controller pin group
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child-binding:
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description: |
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NuMicro pin controller pin configuration node
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include:
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- name: pincfg-node.yaml
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property-allowlist:
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- bias-pull-down
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- bias-pull-up
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- drive-open-drain
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- input-schmitt-enable
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- input-disable
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properties:
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pinmux:
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required: true
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type: array
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description: |
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Pin mux selections for this group. See the SoC level pinctrl dtsi file
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for a defined list of these options.
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slew-rate:
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default: "normal"
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type: string
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enum:
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- "normal"
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- "high"
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- "fast"
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description: |
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Pin output slew rate. Sets the HSRENx register. If not set, defaults to the
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reset value (normal).
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input-debounce:
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type: boolean
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description: |
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enable the input debounce function
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