34 lines
1.1 KiB
YAML
34 lines
1.1 KiB
YAML
# Copyright (c) 2019 Foundries.io
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# Copyright (C) 2019 Peter Bigot Consulting, LLC
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# Copyright (C) 2021 Peter Johanson
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# SPDX-License-Identifier: Apache-2.0
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description: |
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GPIO pins exposed on Seeeduino Xiao (and compatible devices) headers.
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The Seeeeduino Xiao layout provides two headers, along opposite
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edges of the board.
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Proceeding counter-clockwise:
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* A 7-pin Digital/Analog Input header. This has input signals
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labeled from 0 at the top through 6 at the bottom.
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* An 7-pin header Power and Digital/Analog Input header. This
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has three power pins, followed by four inputs labeled 10 at the
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top through 7 at the bottom.
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This binding provides a nexus mapping for 10 pins where parent pins 0
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through 10 correspond to D0 through D10, as depicted below:
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0 D0 5V -
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1 D1 GND -
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2 D2 3V3 -
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3 D3 D10 10
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4 A4 D9 9
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5 D5 D8 8
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6 D6 D7 7
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compatible: "seeed,xiao-gpio"
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include: [gpio-nexus.yaml, base.yaml]
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