69 lines
1.8 KiB
YAML
69 lines
1.8 KiB
YAML
# Copyright (c) 2021, Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip XEC eSPI Host devices
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compatible: "microchip,xec-espi-host-dev"
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include: [base.yaml]
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on-bus: espi
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properties:
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reg:
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required: true
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ldn:
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type: int
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required: true
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description: logical device number
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girqs:
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type: array
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description: array of GIRQ and bit positions
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pcrs:
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type: array
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description: PCR sleep register index and bit position
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# optional properties application to different host facing devices
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host-io:
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type: int
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description: |
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Logical device Host I/O (x86) base. Refer to SoC documentation for the
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number of I/O decoders implemented by a device (1 or 2) and the fixed
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I/O masks.
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host-io-addr-mask:
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type: int
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description: |
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Host I/O address mask. This value is fixed for all HW and is only
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used by Port80 BIOS debug alias device to specify the byte lane the
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alias address is mapped to in the 80h to 83h I/O range.
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host-mem:
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type: int
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description: |
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Logical device Host memory (x86) base address. Refer to SoC
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documentation for which logical devices implement a memory decoder
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and the fixed memory address masking.
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emi-mems:
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type: array
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description: |
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Each EMI host device supports Host access to two SoC data memory
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regions. Each region requires three configuration parameters:
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Base address in the SoC data memory, read limit, and write limit.
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If bits[14:2] of the address written by the Host to the EC address
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register is less than the limit value the access is allowed. Bit[15]
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of the EC address selects which of the two memory regions is accessed.
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"emi-mem-cells":
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type: int
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const: 3
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emi-mem-cells:
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- base
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- rdlimit
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- wrlimit
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