zephyr/samples/boards/intel_s1000_crb
Sathish Kuttan 12c98eceb1 samples: intel_s1000: remove DCACHE_WRITEBACK
Remove DCACHE_WRITEBACK Kconfig variable from DMIC sample app project
Cache configuration is fixed and the cache operation routines
internally take appropriate action based on the cache configuration.

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2019-02-20 07:33:11 -05:00
..
audio doc: intel_s1000: 2-Way audio sample documentation 2019-02-19 10:43:52 -05:00
dmic samples: intel_s1000: remove DCACHE_WRITEBACK 2019-02-20 07:33:11 -05:00
i2s doc: intel_s1000: update I2S sample app doc 2019-02-18 08:23:53 -05:00
intel_s1000_crb.rst doc: intel_s1000: I2S sample app documentation 2019-02-12 21:20:17 -05:00