564 lines
12 KiB
Plaintext
564 lines
12 KiB
Plaintext
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <dt-bindings/clock/imx_ccm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m7";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv7m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <16>;
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};
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};
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};
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <600000000>;
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#clock-cells = <0>;
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};
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soc {
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flexram0: flexram@400b0000 {
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compatible = "nxp,imx-flexram";
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reg = <0x400b0000 0x4000>;
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interrupts = <38 0>;
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#address-cells = <1>;
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#size-cells = <1>;
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itcm0: itcm@0 {
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compatible = "nxp,imx-itcm";
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reg = <0x00000000 0x20000>;
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};
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dtcm0: dtcm@20000000 {
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compatible = "nxp,imx-dtcm";
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reg = <0x20000000 0x20000>;
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};
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ocram0: ocram@20200000 {
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compatible = "mmio-sram";
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reg = <0x20200000 0x40000>;
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};
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};
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flexspi0: spi@402a8000 {
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compatible = "nxp,imx-flexspi";
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reg = <0x402a8000 0x4000>;
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interrupts = <108 0>;
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label = "FLEXSPI0";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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flexspi1: spi@402a4000 {
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compatible = "nxp,imx-flexspi";
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reg = <0x402a4000 0x4000>;
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interrupts = <107 0>;
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label = "FLEXSPI1";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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semc0: semc0@402f0000 {
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compatible = "nxp,imx-semc";
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reg = <0x402f0000 0x4000>;
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interrupts = <109 0>;
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label = "SEMC0";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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gpt1: gpt@401ec000 {
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compatible = "nxp,imx-gpt";
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reg = <0x401ec000 0x4000>;
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interrupts = <100 0>;
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label = "GPT1";
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};
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gpt2: gpt@401f0000 {
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compatible = "nxp,imx-gpt";
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reg = <0x401f0000 0x4000>;
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interrupts = <101 0>;
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label = "GPT2";
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};
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ccm: ccm@400fc000 {
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compatible = "nxp,imx-ccm";
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reg = <0x400fc000 0x4000>;
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label = "CCM";
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#clock-cells = <3>;
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};
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gpio1: gpio@401b8000 {
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compatible = "nxp,imx-gpio";
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reg = <0x401b8000 0x4000>;
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interrupts = <80 0>, <81 0>;
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label = "GPIO_1";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio2: gpio@401bc000 {
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compatible = "nxp,imx-gpio";
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reg = <0x401bc000 0x4000>;
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interrupts = <82 0>, <83 0>;
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label = "GPIO_2";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio3: gpio@401c0000 {
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compatible = "nxp,imx-gpio";
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reg = <0x401c0000 0x4000>;
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interrupts = <84 0>, <85 0>;
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label = "GPIO_3";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio4: gpio@401c4000 {
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compatible = "nxp,imx-gpio";
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reg = <0x401c4000 0x4000>;
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interrupts = <86 0>, <87 0>;
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label = "GPIO_4";
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gpio-controller;
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#gpio-cells = <2>;
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};
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gpio5: gpio@400c0000 {
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compatible = "nxp,imx-gpio";
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reg = <0x400c0000 0x4000>;
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interrupts = <88 0>, <89 0>;
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label = "GPIO_5";
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gpio-controller;
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#gpio-cells = <2>;
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};
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i2c1: i2c@403f0000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x403f0000 0x4000>;
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interrupts = <28 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>;
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label = "I2C_1";
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status = "disabled";
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};
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i2c2: i2c@403f4000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x403f4000 0x4000>;
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interrupts = <29 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>;
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label = "I2C_2";
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status = "disabled";
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};
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i2c3: i2c@403f8000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x403f8000 0x4000>;
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interrupts = <30 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 10>;
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label = "I2C_3";
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status = "disabled";
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};
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i2c4: i2c@403fc000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x403fc000 0x4000>;
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interrupts = <31 0>;
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clocks = <&ccm IMX_CCM_LPI2C_CLK 0x80 24>;
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label = "I2C_4";
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status = "disabled";
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};
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iomuxc: iomuxc@401f8000 {
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reg = <0x401f8000 0x4000>;
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label = "PINMUX_0";
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};
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lcdif1: display-controller@402b8000 {
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compatible = "fsl,imx6sx-lcdif";
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reg = <0x402b8000 0x4000>;
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interrupts = <42 0>;
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label = "ELCDIF_1";
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status = "disabled";
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};
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spi1: spi@40394000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40394000 0x4000>;
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interrupts = <32 3>;
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label = "SPI_1";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi2: spi@40398000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x40398000 0x4000>;
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interrupts = <33 3>;
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label = "SPI_2";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi3: spi@4039c000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x4039c000 0x4000>;
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interrupts = <34 3>;
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label = "SPI_3";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 4>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi4: spi@403a0000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x403a0000 0x4000>;
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interrupts = <35 3>;
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label = "SPI_4";
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status = "disabled";
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clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart1: uart@40184000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40184000 0x4000>;
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interrupts = <20 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 24>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: uart@40188000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40188000 0x4000>;
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interrupts = <21 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 28>;
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label = "UART_2";
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status = "disabled";
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};
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uart3: uart@4018c000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4018c000 0x4000>;
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interrupts = <22 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 12>;
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label = "UART_3";
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status = "disabled";
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};
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uart4: uart@40190000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40190000 0x4000>;
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interrupts = <23 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
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label = "UART_4";
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status = "disabled";
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};
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uart5: uart@40194000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40194000 0x4000>;
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interrupts = <24 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 2>;
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label = "UART_5";
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status = "disabled";
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};
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uart6: uart@40198000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x40198000 0x4000>;
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interrupts = <25 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 6>;
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label = "UART_6";
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status = "disabled";
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};
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uart7: uart@4019c000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4019c000 0x4000>;
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interrupts = <26 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 26>;
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label = "UART_7";
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status = "disabled";
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};
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uart8: uart@401a0000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x401a0000 0x4000>;
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interrupts = <27 0>;
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clocks = <&ccm IMX_CCM_LPUART_CLK 0x80 14>;
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label = "UART_8";
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status = "disabled";
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};
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flexpwm1: flexpwm@403dc000 {
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compatible = "nxp,flexpwm";
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reg = <0x403dc000 0x4000>;
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interrupts = <106 0>;
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flexpwm1_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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label = "FLEXPWM1_PWM0";
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interrupts = <102 0>;
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#pwm-cells = <1>;
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};
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flexpwm1_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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label = "FLEXPWM1_PWM1";
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interrupts = <103 0>;
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#pwm-cells = <1>;
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};
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flexpwm1_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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label = "FLEXPWM1_PWM2";
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interrupts = <104 0>;
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#pwm-cells = <1>;
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};
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flexpwm1_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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label = "FLEXPWM1_PWM3";
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interrupts = <105 0>;
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#pwm-cells = <1>;
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};
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};
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flexpwm2: flexpwm@403e0000 {
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compatible = "nxp,flexpwm";
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reg = <0x403e0000 0x4000>;
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interrupts = <141 0>;
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flexpwm2_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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label = "FLEXPWM2_PWM0";
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interrupts = <137 0>;
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#pwm-cells = <1>;
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};
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flexpwm2_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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label = "FLEXPWM2_PWM1";
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interrupts = <138 0>;
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#pwm-cells = <1>;
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};
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flexpwm2_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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label = "FLEXPWM2_PWM2";
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interrupts = <139 0>;
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#pwm-cells = <1>;
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};
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flexpwm2_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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label = "FLEXPWM2_PWM3";
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interrupts = <140 0>;
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#pwm-cells = <1>;
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};
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};
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flexpwm3: flexpwm@403e4000 {
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compatible = "nxp,flexpwm";
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reg = <0x403e4000 0x4000>;
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interrupts = <146 0>;
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flexpwm3_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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label = "FLEXPWM3_PWM0";
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interrupts = <142 0>;
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#pwm-cells = <1>;
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};
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flexpwm3_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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label = "FLEXPWM3_PWM1";
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interrupts = <143 0>;
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#pwm-cells = <1>;
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};
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flexpwm3_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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label = "FLEXPWM3_PWM2";
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interrupts = <144 0>;
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#pwm-cells = <1>;
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};
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flexpwm3_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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label = "FLEXPWM3_PWM3";
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interrupts = <145 0>;
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#pwm-cells = <1>;
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};
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};
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flexpwm4: flexpwm@403e8000 {
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compatible = "nxp,flexpwm";
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reg = <0x403e8000 0x4000>;
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interrupts = <151 0>;
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flexpwm4_pwm0: pwm0 {
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compatible = "nxp,imx-pwm";
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index = <0>;
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label = "FLEXPWM4_PWM0";
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interrupts = <147 0>;
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#pwm-cells = <1>;
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};
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flexpwm4_pwm1: pwm1 {
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compatible = "nxp,imx-pwm";
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index = <1>;
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label = "FLEXPWM4_PWM1";
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interrupts = <148 0>;
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#pwm-cells = <1>;
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};
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flexpwm4_pwm2: pwm2 {
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compatible = "nxp,imx-pwm";
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index = <2>;
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label = "FLEXPWM4_PWM2";
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interrupts = <149 0>;
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#pwm-cells = <1>;
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};
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flexpwm4_pwm3: pwm3 {
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compatible = "nxp,imx-pwm";
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index = <3>;
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label = "FLEXPWM4_PWM3";
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interrupts = <150 0>;
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#pwm-cells = <1>;
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};
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};
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eth: ethernet@402d8000 {
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compatible = "nxp,kinetis-ethernet";
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reg = <0x402D8000 0x628>;
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interrupts = <114 0>;
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interrupt-names = "COMMON";
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status = "disabled";
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local-mac-address = [00 00 00 00 00 00];
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label = "ETH_0";
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ptp {
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compatible = "nxp,kinetis-ptp";
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status = "disabled";
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interrupts = <115 0>;
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interrupt-names = "IEEE1588_TMR";
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};
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};
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trng: random@400cc000 {
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compatible = "nxp,kinetis-trng";
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reg = <0x400cc000 0x4000>;
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status = "okay";
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interrupts = <53 0>;
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label = "TRNG";
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};
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usbd1: usbd@402e0000 {
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compatible = "nxp,kinetis-usbd";
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reg = <0x402E0000 0x200>;
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interrupts = <113 1>;
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interrupt-names = "usb_otg";
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clocks = <&sysclk>;
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num-bidir-endpoints = <8>;
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maximum-speed = "full-speed";
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status = "disabled";
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label = "USBD_1";
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};
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usbd2: usbd@402e0200 {
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compatible = "nxp,kinetis-usbd";
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reg = <0x402E0200 0x200>;
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interrupts = <112 1>;
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|
interrupt-names = "usb_otg";
|
|
num-bidir-endpoints = <8>;
|
|
maximum-speed = "full-speed";
|
|
status = "disabled";
|
|
label = "USBD_2";
|
|
};
|
|
|
|
usdhc1: usdhc@402c0000 {
|
|
compatible = "nxp,imx-usdhc";
|
|
reg = <0x402c0000 0x4000>;
|
|
status = "disabled";
|
|
interrupts = <110 0>;
|
|
clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
|
|
label = "USDHC_1";
|
|
};
|
|
|
|
usdhc2: usdhc@402c4000 {
|
|
compatible = "nxp,imx-usdhc";
|
|
reg = <0x402c4000 0x4000>;
|
|
status = "disabled";
|
|
interrupts = <111 0>;
|
|
clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
|
|
label = "USDHC_2";
|
|
};
|
|
|
|
csi: csi@402bc000 {
|
|
compatible = "nxp,imx-csi";
|
|
reg = <0x402BC000 0x4000>;
|
|
interrupts = <43 1>;
|
|
status = "disabled";
|
|
label = "CSI";
|
|
};
|
|
};
|
|
};
|
|
|
|
&nvic {
|
|
arm,num-irq-priority-bits = <4>;
|
|
};
|