zephyr/boards/riscv
David Leach d36b1b11f7 boards: riscv: rv32m1: enable BT related configuration
Specific SW defined BLE LL parameters need to be set
if the user enables it on this platform. As such, conditionally
enable them directly into the defconfig.

INTMUX CH2 and CH3 are not available to be used if BT support
is enabled on Vega, because they are used internally by the
BLE SW LL

Signed-off-by: David Leach <david.leach@nxp.com>
2019-11-08 15:38:57 +01:00
..
hifive1
hifive1_revb kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
litex_vexriscv kconfig: Clean up header comments and make them consistent 2019-11-04 17:31:27 -05:00
m2gl025_miv boards: Clean up references to env variable PROJECT_SOURCE_DIR 2019-09-12 13:16:16 -05:00
qemu_riscv32 kconfig: Global whitespace/consistency cleanup 2019-11-01 15:53:23 +01:00
qemu_riscv64 kconfig: Global whitespace/consistency cleanup 2019-11-01 15:53:23 +01:00
rv32m1_vega boards: riscv: rv32m1: enable BT related configuration 2019-11-08 15:38:57 +01:00
index.rst