48 lines
1.6 KiB
YAML
48 lines
1.6 KiB
YAML
# Copyright (c) 2020, Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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description: STM32 Random Number Generator
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compatible: "st,stm32-rng"
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include: base.yaml
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properties:
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reg:
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required: true
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clocks:
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required: true
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description: |
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Specifies the clock line to be enabled in clock controller as well as
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the clock domain used, for instance:
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<&rcc STM32_SRC_MSI CLK48_SEL(3)> /* RNG clock domain set to MSI */
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A correctly configured domain clock is required to allow the integrated low
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sampling clock detection mechanism to behave properly.
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In the provided example, MSI should be configured to provide 48Mhz clock.
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nist-config:
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type: int
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description: |
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This property is used to configure the RNG_CR for the NIST certification
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The validation conditions are following the refMan
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to certify NIST SP800-90B. RNG clock source must be 48MHz.
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This config is valid with some STM32 families
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and when Conditioning Soft Reset (RNG_CR_CONDRST bit) exists.
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The value is directly mapped from the RNG configuration (A) table.
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The Health Register (health-test-config property) must correspond
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to this table configuration.
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On the stm32U5, the ARDIS bit7 is also written.
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health-test-magic:
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type: int
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description: |
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Magic Number to be written to Health Test Configuration Register (HTCR)
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prior to real configuration, if any.
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health-test-config:
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type: int
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description: |
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Heath Test Configuration, necessary to have proper RNG behavior,
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when available.
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