557 lines
19 KiB
C
557 lines
19 KiB
C
/*
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* Copyright (c) 2024 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT renesas_ra_iic
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#include <math.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/irq.h>
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#include <zephyr/sys/util.h>
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#include "r_iic_master.h"
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#include <errno.h>
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#include <soc.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(renesas_ra_iic);
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typedef void (*init_func_t)(const struct device *dev);
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static const double RA_IIC_MASTER_DIV_TIME_NS = 1000000000;
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struct i2c_ra_iic_config {
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void (*irq_config_func)(const struct device *dev);
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const struct pinctrl_dev_config *pcfg;
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uint32_t noise_filter_stage;
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double rise_time_s;
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double fall_time_s;
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uint32_t duty_cycle_percent;
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};
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struct i2c_ra_iic_data {
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iic_master_instance_ctrl_t ctrl;
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i2c_master_cfg_t fsp_config;
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struct k_mutex bus_mutex;
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struct k_sem complete_sem;
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i2c_master_event_t event;
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iic_master_extended_cfg_t iic_master_ext_cfg;
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uint32_t dev_config;
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};
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/* IIC master clock setting calculation function. */
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static void calc_iic_master_clock_setting(const struct device *dev, const uint32_t fsp_i2c_rate,
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iic_master_clock_settings_t *clk_cfg);
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/* FSP interruption handlers. */
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void iic_master_rxi_isr(void);
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void iic_master_txi_isr(void);
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void iic_master_tei_isr(void);
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void iic_master_eri_isr(void);
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struct ra_iic_master_bitrate {
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uint32_t bitrate;
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uint32_t duty;
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uint32_t divider;
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uint32_t brl;
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uint32_t brh;
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uint32_t duty_error_percent;
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};
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static int i2c_ra_iic_configure(const struct device *dev, uint32_t dev_config)
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{
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struct i2c_ra_iic_data *data = (struct i2c_ra_iic_data *const)dev->data;
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if (!(dev_config & I2C_MODE_CONTROLLER)) {
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LOG_ERR("Only I2C Master mode supported.");
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return -EIO;
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}
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switch (I2C_SPEED_GET(dev_config)) {
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case I2C_SPEED_STANDARD:
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data->fsp_config.rate = I2C_MASTER_RATE_STANDARD;
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break;
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case I2C_SPEED_FAST:
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data->fsp_config.rate = I2C_MASTER_RATE_FAST;
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break;
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case I2C_SPEED_FAST_PLUS:
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data->fsp_config.rate = I2C_MASTER_RATE_FASTPLUS;
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break;
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default:
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LOG_ERR("%s: Invalid I2C speed rate flag: %d", __func__, I2C_SPEED_GET(dev_config));
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return -EIO;
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}
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/* Recalc clock setting after updating config. */
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calc_iic_master_clock_setting(dev, data->fsp_config.rate,
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&data->iic_master_ext_cfg.clock_settings);
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R_IIC_MASTER_Close(&data->ctrl);
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R_IIC_MASTER_Open(&data->ctrl, &data->fsp_config);
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/* save current devconfig. */
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data->dev_config = dev_config;
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return 0;
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}
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static int i2c_ra_iic_get_config(const struct device *dev, uint32_t *dev_config)
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{
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struct i2c_ra_iic_data *data = (struct i2c_ra_iic_data *const)dev->data;
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*dev_config = data->dev_config;
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return 0;
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}
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#define OPERATION(msg) (((struct i2c_msg *)msg)->flags & I2C_MSG_RW_MASK)
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static int i2c_ra_iic_transfer(const struct device *dev, struct i2c_msg *msgs, uint8_t num_msgs,
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uint16_t addr)
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{
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struct i2c_ra_iic_data *data = (struct i2c_ra_iic_data *const)dev->data;
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struct i2c_msg *current, *next;
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fsp_err_t fsp_err = FSP_SUCCESS;
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int ret = 0;
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if (!num_msgs) {
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return 0;
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}
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/* Check for validity of all messages before transfer */
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current = msgs;
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/*
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* Set I2C_MSG_RESTART flag on first message in order to send start
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* condition
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*/
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current->flags |= I2C_MSG_RESTART;
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for (int i = 1; i <= num_msgs; i++) {
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if (i < num_msgs) {
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next = current + 1;
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/*
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* Restart condition between messages
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* of different directions is required
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*/
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if (OPERATION(current) != OPERATION(next)) {
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if (!(next->flags & I2C_MSG_RESTART)) {
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LOG_ERR("%s: Restart condition between messages of "
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"different directions is required."
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"Current/Total: [%d/%d]",
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__func__, i, num_msgs);
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ret = -EIO;
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break;
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}
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}
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/* Stop condition is only allowed on last message */
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if (current->flags & I2C_MSG_STOP) {
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LOG_ERR("%s: Invalid stop flag. Stop condition is only allowed on "
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"last message. "
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"Current/Total: [%d/%d]",
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__func__, i, num_msgs);
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ret = -EIO;
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break;
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}
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} else {
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current->flags |= I2C_MSG_STOP;
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}
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current++;
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}
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if (ret) {
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return ret;
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}
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k_mutex_lock(&data->bus_mutex, K_FOREVER);
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/* Set destination address with configured address mode before sending msg. */
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i2c_master_addr_mode_t addr_mode = 0;
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if (I2C_MSG_ADDR_10_BITS & data->dev_config) {
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addr_mode = I2C_MASTER_ADDR_MODE_10BIT;
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} else {
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addr_mode = I2C_MASTER_ADDR_MODE_7BIT;
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}
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R_IIC_MASTER_SlaveAddressSet(&data->ctrl, addr, addr_mode);
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/* Process input `msgs`. */
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current = msgs;
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while (num_msgs > 0) {
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if (num_msgs > 1) {
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next = current + 1;
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} else {
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next = NULL;
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}
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if (current->flags & I2C_MSG_READ) {
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fsp_err =
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R_IIC_MASTER_Read(&data->ctrl, current->buf, current->len,
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next != NULL && (next->flags & I2C_MSG_RESTART));
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} else {
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fsp_err =
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R_IIC_MASTER_Write(&data->ctrl, current->buf, current->len,
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next != NULL && (next->flags & I2C_MSG_RESTART));
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}
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if (fsp_err != FSP_SUCCESS) {
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switch (fsp_err) {
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case FSP_ERR_INVALID_SIZE:
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LOG_ERR("%s: Provided number of bytes more than uint16_t size "
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"(65535) while DTC is used for data transfer.",
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__func__);
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break;
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case FSP_ERR_IN_USE:
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LOG_ERR("%s: Bus busy condition. Another transfer was in progress.",
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__func__);
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break;
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default:
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/* Should not reach here. */
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LOG_ERR("%s: Unknown error. FSP_ERR=%d\n", __func__, fsp_err);
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break;
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}
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ret = -EIO;
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goto RELEASE_BUS;
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}
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/* Wait for callback to return. */
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k_sem_take(&data->complete_sem, K_FOREVER);
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/* Handle event msg from callback. */
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switch (data->event) {
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case I2C_MASTER_EVENT_ABORTED:
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LOG_ERR("%s: %s failed.", __func__,
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(current->flags & I2C_MSG_READ) ? "Read" : "Write");
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ret = -EIO;
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goto RELEASE_BUS;
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case I2C_MASTER_EVENT_RX_COMPLETE:
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break;
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case I2C_MASTER_EVENT_TX_COMPLETE:
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break;
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default:
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break;
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}
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current++;
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num_msgs--;
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}
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RELEASE_BUS:
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k_mutex_unlock(&data->bus_mutex);
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return ret;
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}
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static void i2c_ra_iic_callback(i2c_master_callback_args_t *p_args)
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{
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const struct device *dev = p_args->p_context;
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struct i2c_ra_iic_data *data = dev->data;
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data->event = p_args->event;
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k_sem_give(&data->complete_sem);
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}
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static int i2c_ra_iic_init(const struct device *dev)
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{
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const struct i2c_ra_iic_config *config = dev->config;
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struct i2c_ra_iic_data *data = (struct i2c_ra_iic_data *)dev->data;
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fsp_err_t fsp_err = FSP_SUCCESS;
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int ret = 0;
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/* Configure dt provided device signals when available */
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ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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LOG_ERR("%s: pinctrl config failed.", __func__);
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return ret;
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}
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k_mutex_init(&data->bus_mutex);
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k_sem_init(&data->complete_sem, 0, 1);
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switch (data->fsp_config.rate) {
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case I2C_MASTER_RATE_STANDARD:
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case I2C_MASTER_RATE_FAST:
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case I2C_MASTER_RATE_FASTPLUS:
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calc_iic_master_clock_setting(dev, data->fsp_config.rate,
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&data->iic_master_ext_cfg.clock_settings);
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data->iic_master_ext_cfg.timeout_mode = IIC_MASTER_TIMEOUT_MODE_SHORT;
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data->iic_master_ext_cfg.timeout_scl_low = IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED;
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data->fsp_config.p_extend = &data->iic_master_ext_cfg;
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break;
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default:
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LOG_ERR("%s: Invalid I2C speed rate: %d", __func__, data->fsp_config.rate);
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return -ENOTSUP;
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}
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fsp_err = R_IIC_MASTER_Open(&data->ctrl, &data->fsp_config);
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__ASSERT(fsp_err == FSP_SUCCESS, "%s: Open iic master failed. FSP_ERR=%d", __func__,
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fsp_err);
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config->irq_config_func(dev);
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return 0;
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}
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static void calc_iic_master_bitrate(const struct i2c_ra_iic_config *config, uint32_t total_brl_brh,
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uint32_t brh, uint32_t divider,
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struct ra_iic_master_bitrate *result)
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{
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const uint32_t noise_filter_stage = config->noise_filter_stage;
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const double rise_time_s = config->rise_time_s;
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const double fall_time_s = config->fall_time_s;
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const uint32_t requested_duty = config->duty_cycle_percent;
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const uint32_t peripheral_clock = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKB);
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uint32_t constant_add = 0;
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/* A constant is added to BRL and BRH in all formulas. This constand is 3 + nf
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* when CKS == 0, or 2 + nf when CKS != 0.
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*/
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if (divider == 0) {
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constant_add = 3 + noise_filter_stage;
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} else {
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/* All dividers other than 0 use an addition of 2 + noise_filter_stages. */
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constant_add = 2 + noise_filter_stage;
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}
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/* Converts all divided numbers to double to avoid data loss. */
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uint32_t divided_pclk = (peripheral_clock >> divider);
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result->bitrate =
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1 / ((total_brl_brh + 2 * constant_add) / divided_pclk + rise_time_s + fall_time_s);
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result->duty =
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100 *
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((rise_time_s + ((brh + constant_add) / divided_pclk)) /
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(rise_time_s + fall_time_s + ((total_brl_brh + 2 * constant_add)) / divided_pclk));
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result->divider = divider;
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result->brh = brh;
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result->brl = total_brl_brh - brh;
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result->duty_error_percent =
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(result->duty > requested_duty ? result->duty - requested_duty
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: requested_duty - result->duty) /
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requested_duty;
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LOG_DBG("%s: [input] total_brl_brh[%d] brh[%d] divider[%d]"
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" [output] bitrate[%u] duty[%u] divider[%u] brh[%u] brl[%u] "
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"duty_error_percent[%u]\n",
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__func__, total_brl_brh, brh, divider, result->bitrate, result->duty,
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result->divider, result->brh, result->brl, result->duty_error_percent);
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}
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static void calc_iic_master_clock_setting(const struct device *dev, const uint32_t fsp_i2c_rate,
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iic_master_clock_settings_t *clk_cfg)
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{
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const struct i2c_ra_iic_config *config = dev->config;
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const uint32_t noise_filter_stage = config->noise_filter_stage;
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const double rise_time_s = config->rise_time_s;
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const double fall_time_s = config->fall_time_s;
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const uint32_t requested_duty = config->duty_cycle_percent;
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const uint32_t peripheral_clock = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKB);
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uint32_t requested_bitrate = 0;
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switch (fsp_i2c_rate) {
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case I2C_MASTER_RATE_STANDARD:
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case I2C_MASTER_RATE_FAST:
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case I2C_MASTER_RATE_FASTPLUS:
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requested_bitrate = fsp_i2c_rate;
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break;
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default:
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LOG_ERR("%s: Invalid I2C speed rate: %d", __func__, fsp_i2c_rate);
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return;
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}
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/* Start with maximum possible bitrate. */
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uint32_t min_brh = noise_filter_stage + 1;
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uint32_t min_brl_brh = 2 * min_brh;
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struct ra_iic_master_bitrate bitrate = {};
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calc_iic_master_bitrate(config, min_brl_brh, min_brh, 0, &bitrate);
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/* Start with the smallest divider because it gives the most resolution. */
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uint32_t constant_add = 3 + noise_filter_stage;
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for (int temp_divider = 0; temp_divider <= 7; ++temp_divider) {
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if (1 == temp_divider) {
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/* All dividers other than 0 use an addition of 2 + noise_filter_stages.
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*/
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constant_add = 2 + noise_filter_stage;
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}
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/* If the requested bitrate cannot be achieved with this divider, continue.
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*/
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uint32_t divided_pclk = (peripheral_clock >> temp_divider);
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uint32_t total_brl_brh =
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ceil(((1 / (double)requested_bitrate) - (rise_time_s + fall_time_s)) *
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divided_pclk -
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(2 * constant_add));
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if ((total_brl_brh > 62) || (total_brl_brh < min_brl_brh)) {
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continue;
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}
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uint32_t temp_brh = total_brl_brh * requested_duty / 100;
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if (temp_brh < min_brh) {
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temp_brh = min_brh;
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}
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/* Calculate the actual bitrate and duty cycle. */
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struct ra_iic_master_bitrate temp_bitrate = {};
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calc_iic_master_bitrate(config, total_brl_brh, temp_brh, temp_divider,
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&temp_bitrate);
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/* Adjust duty cycle down if it helps. */
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struct ra_iic_master_bitrate test_bitrate = temp_bitrate;
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while (test_bitrate.duty > requested_duty) {
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temp_brh -= 1;
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if ((temp_brh < min_brh) || ((total_brl_brh - temp_brh) > 31)) {
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break;
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}
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struct ra_iic_master_bitrate new_bitrate = {};
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calc_iic_master_bitrate(config, total_brl_brh, temp_brh, temp_divider,
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&new_bitrate);
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if (new_bitrate.duty_error_percent < temp_bitrate.duty_error_percent) {
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temp_bitrate = new_bitrate;
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} else {
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break;
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}
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}
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/* Adjust duty cycle up if it helps. */
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while (test_bitrate.duty < requested_duty) {
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++temp_brh;
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if ((temp_brh > total_brl_brh) || (temp_brh > 31) ||
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((total_brl_brh - temp_brh) < min_brh)) {
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break;
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}
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struct ra_iic_master_bitrate new_bitrate = {};
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calc_iic_master_bitrate(config, total_brl_brh, temp_brh, temp_divider,
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&new_bitrate);
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if (new_bitrate.duty_error_percent < temp_bitrate.duty_error_percent) {
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temp_bitrate = new_bitrate;
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} else {
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break;
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}
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}
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if ((temp_bitrate.brh < 32) && (temp_bitrate.brl < 32)) {
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/* Valid setting found. */
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bitrate = temp_bitrate;
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break;
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}
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}
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clk_cfg->brl_value = bitrate.brl;
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clk_cfg->brh_value = bitrate.brh;
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clk_cfg->cks_value = bitrate.divider;
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LOG_DBG("%s: [input] rate[%u] [output] brl[%u] brh[%u] cks[%u]\n", __func__, fsp_i2c_rate,
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clk_cfg->brl_value, clk_cfg->brh_value, clk_cfg->cks_value);
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}
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static const struct i2c_driver_api i2c_ra_iic_driver_api = {
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.configure = i2c_ra_iic_configure,
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.get_config = i2c_ra_iic_get_config,
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.transfer = i2c_ra_iic_transfer,
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};
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#define _ELC_EVENT_IIC_RXI(channel) ELC_EVENT_IIC##channel##_RXI
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#define _ELC_EVENT_IIC_TXI(channel) ELC_EVENT_IIC##channel##_TXI
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#define _ELC_EVENT_IIC_TEI(channel) ELC_EVENT_IIC##channel##_TEI
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#define _ELC_EVENT_IIC_ERI(channel) ELC_EVENT_IIC##channel##_ERI
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#define ELC_EVENT_IIC_RXI(channel) _ELC_EVENT_IIC_RXI(channel)
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#define ELC_EVENT_IIC_TXI(channel) _ELC_EVENT_IIC_TXI(channel)
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#define ELC_EVENT_IIC_TEI(channel) _ELC_EVENT_IIC_TEI(channel)
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#define ELC_EVENT_IIC_ERI(channel) _ELC_EVENT_IIC_ERI(channel)
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#define I2C_RA_IIC_INIT(index) \
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\
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PINCTRL_DT_INST_DEFINE(index); \
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\
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static void i2c_ra_iic_irq_config_func##index(const struct device *dev) \
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{ \
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R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, rxi, irq)] = \
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ELC_EVENT_IIC_RXI(DT_INST_PROP(index, channel)); \
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R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, txi, irq)] = \
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ELC_EVENT_IIC_TXI(DT_INST_PROP(index, channel)); \
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R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, tei, irq)] = \
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ELC_EVENT_IIC_TEI(DT_INST_PROP(index, channel)); \
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R_ICU->IELSR[DT_INST_IRQ_BY_NAME(index, eri, irq)] = \
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ELC_EVENT_IIC_ERI(DT_INST_PROP(index, channel)); \
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\
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, rxi, irq), \
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DT_INST_IRQ_BY_NAME(index, rxi, priority), iic_master_rxi_isr, \
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DEVICE_DT_INST_GET(index), 0); \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, txi, irq), \
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DT_INST_IRQ_BY_NAME(index, txi, priority), iic_master_txi_isr, \
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DEVICE_DT_INST_GET(index), 0); \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, tei, irq), \
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DT_INST_IRQ_BY_NAME(index, tei, priority), iic_master_tei_isr, \
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DEVICE_DT_INST_GET(index), 0); \
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IRQ_CONNECT(DT_INST_IRQ_BY_NAME(index, eri, irq), \
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DT_INST_IRQ_BY_NAME(index, eri, priority), iic_master_eri_isr, \
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DEVICE_DT_INST_GET(index), 0); \
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\
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irq_enable(DT_INST_IRQ_BY_NAME(index, rxi, irq)); \
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irq_enable(DT_INST_IRQ_BY_NAME(index, txi, irq)); \
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irq_enable(DT_INST_IRQ_BY_NAME(index, tei, irq)); \
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irq_enable(DT_INST_IRQ_BY_NAME(index, eri, irq)); \
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} \
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\
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static const struct i2c_ra_iic_config i2c_ra_iic_config_##index = { \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.irq_config_func = i2c_ra_iic_irq_config_func##index, \
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.noise_filter_stage = 1, /* Cannot be configured. */ \
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.rise_time_s = DT_INST_PROP(index, rise_time_ns) / RA_IIC_MASTER_DIV_TIME_NS, \
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.fall_time_s = DT_INST_PROP(index, fall_time_ns) / RA_IIC_MASTER_DIV_TIME_NS, \
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.duty_cycle_percent = DT_INST_PROP(index, duty_cycle_percent), \
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}; \
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\
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static struct i2c_ra_iic_data i2c_ra_iic_data_##index = { \
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.fsp_config = \
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|
{ \
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.channel = DT_INST_PROP(index, channel), \
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.slave = 0, \
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.rate = DT_INST_PROP(index, clock_frequency), \
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|
.addr_mode = I2C_MASTER_ADDR_MODE_7BIT, \
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.ipl = DT_INST_PROP(index, interrupt_priority_level), \
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|
.rxi_irq = DT_INST_IRQ_BY_NAME(index, rxi, irq), \
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|
.txi_irq = DT_INST_IRQ_BY_NAME(index, txi, irq), \
|
|
.tei_irq = DT_INST_IRQ_BY_NAME(index, tei, irq), \
|
|
.eri_irq = DT_INST_IRQ_BY_NAME(index, eri, irq), \
|
|
.p_callback = i2c_ra_iic_callback, \
|
|
.p_context = DEVICE_DT_GET(DT_DRV_INST(index)), \
|
|
}, \
|
|
}; \
|
|
\
|
|
I2C_DEVICE_DT_INST_DEFINE(index, i2c_ra_iic_init, NULL, &i2c_ra_iic_data_##index, \
|
|
&i2c_ra_iic_config_##index, POST_KERNEL, \
|
|
CONFIG_I2C_INIT_PRIORITY, &i2c_ra_iic_driver_api);
|
|
|
|
DT_INST_FOREACH_STATUS_OKAY(I2C_RA_IIC_INIT)
|