394 lines
10 KiB
C
394 lines
10 KiB
C
/*
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* Copyright (c) 2016 Freescale Semiconductor, Inc.
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* Copyright 2019-2023, NXP
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* Copyright (c) 2022 Vestas Wind Systems A/S
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* Copyright (c) 2024 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_lpi2c
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#include <errno.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/i2c/rtio.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/kernel.h>
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#include <zephyr/irq.h>
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#include <fsl_lpi2c.h>
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#include <zephyr/drivers/pinctrl.h>
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#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
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#include "i2c_bitbang.h"
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#include <zephyr/drivers/gpio.h>
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(mcux_lpi2c);
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#include "i2c-priv.h"
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/* Wait for the duration of 12 bits to detect a NAK after a bus
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* address scan. (10 appears sufficient, 20% safety factor.)
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*/
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#define SCAN_DELAY_US(baudrate) (12 * USEC_PER_SEC / baudrate)
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/* Required by DEVICE_MMIO_NAMED_* macros */
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#define DEV_CFG(_dev) \
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((const struct mcux_lpi2c_config *)(_dev)->config)
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#define DEV_DATA(_dev) ((struct mcux_lpi2c_data *)(_dev)->data)
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struct mcux_lpi2c_config {
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DEVICE_MMIO_NAMED_ROM(reg_base);
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const struct device *clock_dev;
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clock_control_subsys_t clock_subsys;
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void (*irq_config_func)(const struct device *dev);
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uint32_t bitrate;
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uint32_t bus_idle_timeout_ns;
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const struct pinctrl_dev_config *pincfg;
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#ifdef CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
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struct gpio_dt_spec scl;
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struct gpio_dt_spec sda;
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
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};
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struct mcux_lpi2c_data {
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DEVICE_MMIO_NAMED_RAM(reg_base);
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lpi2c_master_handle_t handle;
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struct i2c_rtio *ctx;
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lpi2c_master_transfer_t transfer;
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#ifdef CONFIG_I2C_TARGET
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lpi2c_slave_handle_t target_handle;
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struct i2c_target_config *target_cfg;
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bool target_attached;
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bool first_tx;
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bool read_active;
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bool send_ack;
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#endif
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};
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static int mcux_lpi2c_configure(const struct device *dev,
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uint32_t dev_config_raw)
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{
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struct i2c_rtio *const ctx = ((struct mcux_lpi2c_data *)
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dev->data)->ctx;
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return i2c_rtio_configure(ctx, dev_config_raw);
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}
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static int mcux_lpi2c_do_configure(const struct device *dev, uint32_t dev_config_raw)
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{
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const struct mcux_lpi2c_config *config = dev->config;
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
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uint32_t clock_freq;
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uint32_t baudrate;
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if (!(I2C_MODE_CONTROLLER & dev_config_raw)) {
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return -EINVAL;
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}
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if (I2C_ADDR_10_BITS & dev_config_raw) {
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return -EINVAL;
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}
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switch (I2C_SPEED_GET(dev_config_raw)) {
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case I2C_SPEED_STANDARD:
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baudrate = KHZ(100);
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break;
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case I2C_SPEED_FAST:
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baudrate = KHZ(400);
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break;
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case I2C_SPEED_FAST_PLUS:
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baudrate = MHZ(1);
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break;
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default:
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return -EINVAL;
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}
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
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&clock_freq)) {
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return -EINVAL;
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}
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LPI2C_MasterSetBaudRate(base, clock_freq, baudrate);
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return 0;
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}
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static uint32_t mcux_lpi2c_convert_flags(int msg_flags)
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{
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uint32_t flags = 0U;
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if (!(msg_flags & I2C_MSG_STOP)) {
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flags |= kLPI2C_TransferNoStopFlag;
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}
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if (msg_flags & I2C_MSG_RESTART) {
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flags |= kLPI2C_TransferRepeatedStartFlag;
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}
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return flags;
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}
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static bool mcux_lpi2c_msg_start(const struct device *dev, uint8_t flags,
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uint8_t *buf, size_t buf_len, uint16_t i2c_addr)
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{
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struct mcux_lpi2c_data *data = dev->data;
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struct i2c_rtio *ctx = data->ctx;
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
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lpi2c_master_transfer_t *transfer = &data->transfer;
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status_t status;
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if (I2C_MSG_ADDR_10_BITS & flags) {
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return i2c_rtio_complete(ctx, -ENOTSUP);
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}
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/* Initialize the transfer descriptor */
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transfer->flags = mcux_lpi2c_convert_flags(flags);
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/* Prevent the controller to send a start condition between
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* messages, except if explicitly requested.
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*/
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if (ctx->txn_curr != ctx->txn_head && !(flags & I2C_MSG_RESTART)) {
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transfer->flags |= kLPI2C_TransferNoStartFlag;
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}
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transfer->slaveAddress = i2c_addr;
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transfer->direction = (flags & I2C_MSG_READ)
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? kLPI2C_Read : kLPI2C_Write;
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transfer->subaddress = 0;
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transfer->subaddressSize = 0;
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transfer->data = buf;
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transfer->dataSize = buf_len;
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/* Start the transfer */
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status = LPI2C_MasterTransferNonBlocking(base,
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&data->handle, transfer);
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/* Return an error if the transfer didn't start successfully
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* e.g., if the bus was busy
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*/
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if (status != kStatus_Success) {
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LPI2C_MasterTransferAbort(base, &data->handle);
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return i2c_rtio_complete(ctx, -EIO);
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}
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return false;
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}
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static void mcux_lpi2c_complete(const struct device *dev, int status);
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static bool mcux_lpi2c_start(const struct device *dev)
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{
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struct mcux_lpi2c_data *data = dev->data;
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struct i2c_rtio *ctx = data->ctx;
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struct rtio_sqe *sqe = &ctx->txn_curr->sqe;
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struct i2c_dt_spec *dt_spec = sqe->iodev->data;
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int res = 0;
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switch (sqe->op) {
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case RTIO_OP_RX:
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return mcux_lpi2c_msg_start(dev, I2C_MSG_READ | sqe->iodev_flags,
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sqe->rx.buf, sqe->rx.buf_len, dt_spec->addr);
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case RTIO_OP_TINY_TX:
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return mcux_lpi2c_msg_start(dev, I2C_MSG_WRITE | sqe->iodev_flags,
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(uint8_t *)sqe->tiny_tx.buf, sqe->tiny_tx.buf_len,
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dt_spec->addr);
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case RTIO_OP_TX:
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return mcux_lpi2c_msg_start(dev, I2C_MSG_WRITE | sqe->iodev_flags,
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(uint8_t *)sqe->tx.buf, sqe->tx.buf_len,
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dt_spec->addr);
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case RTIO_OP_I2C_CONFIGURE:
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res = mcux_lpi2c_do_configure(dev, sqe->i2c_config);
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return i2c_rtio_complete(data->ctx, res);
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default:
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LOG_ERR("Invalid op code %d for submission %p\n", sqe->op, (void *)sqe);
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return i2c_rtio_complete(data->ctx, -EINVAL);
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}
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}
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static void mcux_lpi2c_complete(const struct device *dev, status_t status)
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{
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const struct mcux_lpi2c_config *config = dev->config;
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struct mcux_lpi2c_data *data = dev->data;
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
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struct i2c_rtio *const ctx = data->ctx;
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int ret = 0;
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/* Return an error if the transfer didn't complete
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* successfully. e.g., nak, timeout, lost arbitration
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*/
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if (status != kStatus_Success) {
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LPI2C_MasterTransferAbort(base, &data->handle);
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ret = -EIO;
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goto out;
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}
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if (data->transfer.dataSize == 0) {
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k_busy_wait(SCAN_DELAY_US(config->bitrate));
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if (0 != (base->MSR & LPI2C_MSR_NDF_MASK)) {
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LPI2C_MasterTransferAbort(base, &data->handle);
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ret = -EIO;
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goto out;
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}
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}
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out:
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if (i2c_rtio_complete(ctx, ret)) {
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mcux_lpi2c_start(dev);
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}
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}
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static void mcux_lpi2c_submit(const struct device *dev, struct rtio_iodev_sqe *iodev_sqe)
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{
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struct mcux_lpi2c_data *data = dev->data;
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struct i2c_rtio *const ctx = data->ctx;
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if (i2c_rtio_submit(ctx, iodev_sqe)) {
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mcux_lpi2c_start(dev);
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}
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}
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static void mcux_lpi2c_master_transfer_callback(LPI2C_Type *base,
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lpi2c_master_handle_t *handle,
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status_t status, void *userData)
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{
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ARG_UNUSED(handle);
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ARG_UNUSED(base);
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const struct device *dev = userData;
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mcux_lpi2c_complete(dev, status);
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}
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static int mcux_lpi2c_transfer(const struct device *dev, struct i2c_msg *msgs,
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uint8_t num_msgs, uint16_t addr)
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{
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struct i2c_rtio *const ctx = ((struct mcux_lpi2c_data *)
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dev->data)->ctx;
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return i2c_rtio_transfer(ctx, msgs, num_msgs, addr);
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}
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static void mcux_lpi2c_isr(const struct device *dev)
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{
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struct mcux_lpi2c_data *data = dev->data;
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LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
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LPI2C_MasterTransferHandleIRQ(base, &data->handle);
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}
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static int mcux_lpi2c_init(const struct device *dev)
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{
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const struct mcux_lpi2c_config *config = dev->config;
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struct mcux_lpi2c_data *data = dev->data;
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LPI2C_Type *base;
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uint32_t clock_freq, bitrate_cfg;
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lpi2c_master_config_t master_config;
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int error;
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DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP);
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base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base);
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if (!device_is_ready(config->clock_dev)) {
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LOG_ERR("clock control device not ready");
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return -ENODEV;
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}
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error = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
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if (error) {
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return error;
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}
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if (clock_control_get_rate(config->clock_dev, config->clock_subsys,
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&clock_freq)) {
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return -EINVAL;
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}
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LPI2C_MasterGetDefaultConfig(&master_config);
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master_config.busIdleTimeout_ns = config->bus_idle_timeout_ns;
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LPI2C_MasterInit(base, &master_config, clock_freq);
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LPI2C_MasterTransferCreateHandle(base, &data->handle,
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mcux_lpi2c_master_transfer_callback,
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(void *)dev);
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bitrate_cfg = i2c_map_dt_bitrate(config->bitrate);
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error = mcux_lpi2c_do_configure(dev, I2C_MODE_CONTROLLER | bitrate_cfg);
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if (error) {
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return error;
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}
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config->irq_config_func(dev);
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i2c_rtio_init(data->ctx, dev);
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return 0;
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}
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static const struct i2c_driver_api mcux_lpi2c_driver_api = {
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.configure = mcux_lpi2c_configure,
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.transfer = mcux_lpi2c_transfer,
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.iodev_submit = mcux_lpi2c_submit,
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};
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#if CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY
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#define I2C_MCUX_LPI2C_SCL_INIT(n) .scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),
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#define I2C_MCUX_LPI2C_SDA_INIT(n) .sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),
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#else
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#define I2C_MCUX_LPI2C_SCL_INIT(n)
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#define I2C_MCUX_LPI2C_SDA_INIT(n)
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#endif /* CONFIG_I2C_MCUX_LPI2C_BUS_RECOVERY */
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#define I2C_MCUX_LPI2C_INIT(n) \
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PINCTRL_DT_INST_DEFINE(n); \
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\
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static void mcux_lpi2c_config_func_##n(const struct device *dev); \
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\
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static const struct mcux_lpi2c_config mcux_lpi2c_config_##n = { \
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DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
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.irq_config_func = mcux_lpi2c_config_func_##n, \
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.bitrate = DT_INST_PROP(n, clock_frequency), \
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.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
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I2C_MCUX_LPI2C_SCL_INIT(n) \
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I2C_MCUX_LPI2C_SDA_INIT(n) \
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.bus_idle_timeout_ns = \
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UTIL_AND(DT_INST_NODE_HAS_PROP(n, bus_idle_timeout),\
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DT_INST_PROP(n, bus_idle_timeout)), \
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}; \
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\
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I2C_RTIO_DEFINE(_i2c##n##_lpi2c_rtio, \
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DT_INST_PROP_OR(n, sq_size, CONFIG_I2C_RTIO_SQ_SIZE), \
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DT_INST_PROP_OR(n, cq_size, CONFIG_I2C_RTIO_CQ_SIZE)); \
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\
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static struct mcux_lpi2c_data mcux_lpi2c_data_##n = { \
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.ctx = &CONCAT(_i2c, n, _lpi2c_rtio), \
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}; \
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\
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I2C_DEVICE_DT_INST_DEFINE(n, mcux_lpi2c_init, NULL, \
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&mcux_lpi2c_data_##n, \
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&mcux_lpi2c_config_##n, POST_KERNEL, \
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CONFIG_I2C_INIT_PRIORITY, \
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&mcux_lpi2c_driver_api); \
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\
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static void mcux_lpi2c_config_func_##n(const struct device *dev)\
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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mcux_lpi2c_isr, \
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DEVICE_DT_INST_GET(n), 0); \
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\
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irq_enable(DT_INST_IRQN(n)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(I2C_MCUX_LPI2C_INIT)
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