126 lines
3.8 KiB
ReStructuredText
126 lines
3.8 KiB
ReStructuredText
.. _qemu_cortex_m3:
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ARM Cortex-M3 Emulation (QEMU)
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##############################
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Overview
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********
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This board configuration will use QEMU to emulate the TI LM3S6965 platform.
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This configuration provides support for an ARM Cortex-M3 CPU and these devices:
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* Nested Vectored Interrupt Controller
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* System Tick System Clock
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* Stellaris UART
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.. note::
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This board configuration makes no claims about its suitability for use
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with an actual ti_lm3s6965 hardware system, or any other hardware system.
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Hardware
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********
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Supported Features
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==================
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The following hardware features are supported:
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+--------------+------------+----------------------+
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| Interface | Controller | Driver/Component |
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+==============+============+======================+
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| NVIC | on-chip | nested vectored |
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| | | interrupt controller |
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+--------------+------------+----------------------+
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| Stellaris | on-chip | serial port |
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| UART | | |
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+--------------+------------+----------------------+
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| SYSTICK | on-chip | system clock |
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+--------------+------------+----------------------+
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The kernel currently does not support other hardware features on this platform.
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Devices
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========
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System Clock
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------------
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This board configuration uses a system clock frequency of 12 MHz.
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Serial Port
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-----------
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This board configuration uses a single serial communication channel with the
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CPU's UART0.
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If SLIP networking is enabled (see below), an additional serial port will be
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used for it.
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Known Problems or Limitations
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==============================
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The following platform features are unsupported:
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* Memory protection through optional MPU. However, using a XIP kernel
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effectively provides TEXT/RODATA write protection in ROM.
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* SRAM at addresses 0x1FFF0000-0x1FFFFFFF
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* Writing to the hardware's flash memory
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Programming and Debugging
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*************************
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Use this configuration to run basic Zephyr applications and kernel tests in the QEMU
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emulated environment, for example, with the :zephyr:code-sample:`synchronization` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/synchronization
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:host-os: unix
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:board: qemu_cortex_m3
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:goals: run
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This will build an image with the synchronization sample app, boot it using
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QEMU, and display the following console output:
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.. code-block:: console
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***** BOOTING ZEPHYR OS v1.8.99 - BUILD: Jun 27 2017 13:09:26 *****
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threadA: Hello World from arm!
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threadB: Hello World from arm!
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threadA: Hello World from arm!
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threadB: Hello World from arm!
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threadA: Hello World from arm!
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threadB: Hello World from arm!
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threadA: Hello World from arm!
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threadB: Hello World from arm!
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threadA: Hello World from arm!
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threadB: Hello World from arm!
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Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`.
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Debugging
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=========
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Refer to the detailed overview about :ref:`application_debugging`.
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Networking
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==========
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The board supports SLIP networking over an emulated serial port
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(``CONFIG_NET_SLIP_TAP=y``). The detailed setup is described in
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:ref:`networking_with_qemu`.
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It is also possible to use the QEMU built-in Ethernet adapter to connect
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to the host system. This is faster than using SLIP and is also the preferred
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way. See :ref:`networking_with_eth_qemu` for details.
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References
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**********
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1. The Definitive Guide to the ARM Cortex-M3, Second Edition by Joseph Yiu (ISBN
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978-0-12-382090-7)
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2. ARMv7-M Architecture Technical Reference Manual (ARM DDI 0403D ID021310)
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3. Procedure Call Standard for the ARM Architecture (ARM IHI 0042E, current
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through ABI release 2.09, 2012/11/30)
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4. Cortex-M3 Revision r2p1 Technical Reference Manual (ARM DDI 0337I ID072410)
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5. Cortex-M3 Devices Generic User Guide (ARM DUI 0052A ID121610)
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