zephyr/boards/atmarktechno/degu_evk/degu_evk-pinctrl.dtsi

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/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 25)>,
<NRF_PSEL(UART_RX, 0, 24)>,
<NRF_PSEL(UART_RTS, 0, 23)>,
<NRF_PSEL(UART_CTS, 0, 21)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 25)>,
<NRF_PSEL(UART_RX, 0, 24)>,
<NRF_PSEL(UART_RTS, 0, 23)>,
<NRF_PSEL(UART_CTS, 0, 21)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
<NRF_PSEL(TWIM_SCL, 0, 22)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 20)>,
<NRF_PSEL(TWIM_SCL, 0, 22)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 1, 9)>,
<NRF_PSEL(TWIM_SCL, 0, 11)>;
low-power-enable;
};
};
};