103 lines
2.4 KiB
Plaintext
103 lines
2.4 KiB
Plaintext
# LPC LPC55XXX Series
|
|
|
|
# Copyright (c) 2019, NXP
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
choice
|
|
prompt "LPC5500 Series MCU Selection"
|
|
depends on SOC_SERIES_LPC55XXX
|
|
|
|
config SOC_LPC55S16
|
|
bool "SOC_LPC55S16 M33"
|
|
select CPU_CORTEX_M33
|
|
select CPU_HAS_ARM_SAU
|
|
select CPU_HAS_ARM_MPU
|
|
select CPU_HAS_FPU
|
|
select ARMV8_M_DSP
|
|
select ARM_TRUSTZONE_M
|
|
select CLOCK_CONTROL
|
|
select HAS_MCUX_IAP if !TRUSTED_EXECUTION_NONSECURE
|
|
|
|
config SOC_LPC55S28
|
|
bool "SOC_LPC55S28 M33"
|
|
select CPU_CORTEX_M33
|
|
select CPU_HAS_ARM_SAU
|
|
select CPU_HAS_ARM_MPU
|
|
select CPU_HAS_FPU
|
|
select ARMV8_M_DSP
|
|
select ARM_TRUSTZONE_M
|
|
select CLOCK_CONTROL
|
|
select HAS_MCUX_IAP
|
|
select HAS_MCUX_LPADC
|
|
select HAS_MCUX_LPC_DMA
|
|
|
|
config SOC_LPC55S69_CPU0
|
|
bool "SOC_LPC55S69 M33 [CPU 0]"
|
|
select CPU_CORTEX_M33
|
|
select CPU_HAS_ARM_SAU
|
|
select CPU_HAS_ARM_MPU
|
|
select CPU_HAS_FPU
|
|
select ARMV8_M_DSP
|
|
select ARM_TRUSTZONE_M
|
|
select CLOCK_CONTROL
|
|
select HAS_MCUX_IAP
|
|
select HAS_MCUX_LPADC
|
|
select HAS_MCUX_LPC_DMA
|
|
|
|
config SOC_LPC55S69_CPU1
|
|
bool "SOC_LPC55S69 M33 [CPU 1]"
|
|
select CPU_CORTEX_M33
|
|
|
|
endchoice
|
|
|
|
if SOC_SERIES_LPC55XXX
|
|
|
|
config SOC_PART_NUMBER_LPC55S16JBD100
|
|
bool
|
|
|
|
config SOC_PART_NUMBER_LPC55S28JBD100
|
|
bool
|
|
|
|
config SOC_PART_NUMBER_LPC55S69JBD100
|
|
bool
|
|
|
|
config SOC_PART_NUMBER_LPC55S69JET98
|
|
bool
|
|
|
|
config SOC_PART_NUMBER_LPC55XXX
|
|
string
|
|
default "LPC55S16JBD100" if SOC_PART_NUMBER_LPC55S16JBD100
|
|
default "LPC55S28JBD100" if SOC_PART_NUMBER_LPC55S28JBD100
|
|
default "LPC55S69JBD100" if SOC_PART_NUMBER_LPC55S69JBD100
|
|
default "LPC55S69JET98" if SOC_PART_NUMBER_LPC55S69JET98
|
|
|
|
help
|
|
This string holds the full part number of the SoC. It is a hidden
|
|
option that you should not set directly. The part number selection
|
|
choice defines the default value for this string.
|
|
|
|
config SECOND_CORE_MCUX
|
|
bool "Enable LPC55xxx's second core"
|
|
depends on HAS_MCUX
|
|
help
|
|
Driver for second core startup
|
|
|
|
config SECOND_IMAGE_MCUX
|
|
depends on SECOND_CORE_MCUX
|
|
string "Binary image of second core's code"
|
|
help
|
|
This points to the image file for the the binary code that will be
|
|
used by the second core.
|
|
|
|
# Workaround for not being able to have commas in macro arguments
|
|
DT_CHOSEN_Z_CODE_CPU1_PARTITION := zephyr,code-cpu1-partition
|
|
|
|
config SECOND_CORE_BOOT_ADDRESS_MCUX
|
|
depends on SECOND_CORE_MCUX
|
|
hex "Address the second core will boot at"
|
|
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_CPU1_PARTITION))
|
|
help
|
|
This is the address the second core will boot from.
|
|
|
|
endif # SOC_SERIES_LPC55XXX
|