60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/*
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* Copyright (c) 2021, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr.h>
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#include <pm/pm.h>
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#include "fsl_power.h"
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#include <logging/log.h>
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LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
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/*!< Power down all unnecessary blocks and enable RBB during deep sleep. */
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#define APP_DEEPSLEEP_RUNCFG0 (SYSCTL0_PDRUNCFG0_LPOSC_PD_MASK | \
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SYSCTL0_PDSLEEPCFG0_RBB_PD_MASK)
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#define APP_DEEPSLEEP_RAM_APD 0xFFFFF8U
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#define APP_DEEPSLEEP_RAM_PPD 0x0U
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#define APP_EXCLUDE_FROM_DEEPSLEEP \
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(((const uint32_t[]){APP_DEEPSLEEP_RUNCFG0, \
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(SYSCTL0_PDSLEEPCFG1_FLEXSPI_SRAM_APD_MASK | \
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SYSCTL0_PDSLEEPCFG1_FLEXSPI_SRAM_PPD_MASK), \
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APP_DEEPSLEEP_RAM_APD, APP_DEEPSLEEP_RAM_PPD}))
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/* Invoke Low Power/System Off specific Tasks */
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void pm_power_state_set(struct pm_state_info info)
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{
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/* FIXME: When this function is entered the Kernel has disabled
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* interrupts using BASEPRI register. This is incorrect as it prevents
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* waking up from any interrupt which priority is not 0. Work around the
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* issue and disable interrupts using PRIMASK register as recommended
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* by ARM.
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*/
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/* Set PRIMASK */
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__disable_irq();
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/* Set BASEPRI to 0 */
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irq_unlock(0);
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switch (info.state) {
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case PM_STATE_RUNTIME_IDLE:
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POWER_EnterSleep();
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break;
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case PM_STATE_SUSPEND_TO_IDLE:
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POWER_EnterDeepSleep(APP_EXCLUDE_FROM_DEEPSLEEP);
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break;
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default:
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LOG_DBG("Unsupported power state %u", info.state);
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break;
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}
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}
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/* Handle SOC specific activity after Low Power Mode Exit */
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void pm_power_state_exit_post_ops(struct pm_state_info info)
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{
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ARG_UNUSED(info);
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/* Clear PRIMASK */
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__enable_irq();
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}
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