56 lines
1.5 KiB
Plaintext
56 lines
1.5 KiB
Plaintext
# Nordic Semiconductor nRFx MCU line
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# Copyright (c) 2016-2018 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config SOC_FAMILY_NRF
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select SOC_COMPATIBLE_NRF
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select PLATFORM_SPECIFIC_INIT
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bool
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if SOC_FAMILY_NRF
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config SOC_FAMILY
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string
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default "nordic_nrf"
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source "soc/arm/nordic_nrf/Kconfig.peripherals"
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source "soc/arm/nordic_nrf/*/Kconfig.soc"
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config NRF_MPU_FLASH_REGION_SIZE
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hex
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default 0x1000
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depends on HAS_HW_NRF_MPU
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help
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FLASH region size for the NRF_MPU peripheral.
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config NRF_BPROT_FLASH_REGION_SIZE
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hex
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default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size)
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depends on HAS_HW_NRF_BPROT
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help
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FLASH region size for the NRF_BPROT peripheral (nRF52).
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config NRF_ACL_FLASH_REGION_SIZE
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hex
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default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size)
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depends on HAS_HW_NRF_ACL
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help
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FLASH region size for the NRF_ACL peripheral.
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config NFCT_PINS_AS_GPIOS
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bool "NFCT pins as GPIOs"
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depends on HAS_HW_NRF_NFCT
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help
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Two pins are usually reserved for NFC in SoCs that implement the
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NFCT peripheral. This option switches them to normal GPIO mode.
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HW enabling happens once in the device lifetime, during the first
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system startup. Disabling this option will not switch back these
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pins to NFCT mode. Doing this requires UICR erase prior to
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flashing device using the image which has this option disabled.
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NFC pins in nRF52 series: P0.09 and P0.10
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NFC pins in nRF5340: P0.02 and P0.03
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endif # SOC_FAMILY_NRF
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