86 lines
3.2 KiB
C
86 lines
3.2 KiB
C
/* Freescale K6x microprocessor MPU register definitions */
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/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of Wind River Systems nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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DESCRIPTION
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This module defines the Memory Protection Unit (MPU) Registers for the
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K6x Family of microprocessors.
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NOTE: Not all the registers are currently defined here - only those that are
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currently used.
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*/
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#ifndef _K6xMPU_H_
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#define _K6xMPU_H_
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#include <stdint.h>
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#define MPU_VALID_MASK 0x01
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#define MPU_SLV_PORT_ERR_MASK 0xF8
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typedef union {
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uint32_t value;
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struct {
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uint8_t valid : 1 __packed; /* MPU valid/enable */
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uint8_t res_1 : 7 __packed; /* RAZ/WI */
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uint8_t numRgnDescs : 4 __packed; /* # of regions */
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uint8_t numSlvPorts : 4 __packed; /* # of slave ports */
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uint8_t hwRevLvl : 4 __packed; /* Hardware revision */
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uint8_t res_20 : 3 __packed; /* RAZ/WI */
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uint8_t res_23 : 1 __packed; /* RAO/WI */
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uint8_t res_24 : 3 __packed; /* RAZ/WI */
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uint8_t slvPortNErr : 5 __packed; /* slave port N err */
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} field;
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} CESR_t; /* 0x000 Control/Error Status Register */
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#define MPU_NUM_SLV_PORTS 5
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#define MPU_NUM_REGIONS 12
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#define MPU_NUM_WORDS_PER_REGION 4
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typedef volatile struct {
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CESR_t ctrlErrStatus; /* 0x0000 */
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uint32_t errAddr0; /* 0x0010 */
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uint32_t errDetail0; /* 0x0014 */
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uint32_t errAddr1; /* 0x0018 */
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uint32_t errDetail1; /* 0x001C */
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uint32_t errAddr2; /* 0x0020 */
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uint32_t errDetail2; /* 0x0024 */
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uint32_t errAddr3; /* 0x0028 */
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uint32_t errDetail3; /* 0x002C */
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uint32_t errAddr4; /* 0x0030 */
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uint32_t errDetail4; /* 0x0034 */
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uint32_t rgnDesc[MPU_NUM_REGIONS][MPU_NUM_WORDS_PER_REGION]; /* 0x0400
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*/
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uint32_t rgnDescAltAccCtrl[MPU_NUM_REGIONS]; /* 0x0800 */
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} K6x_MPU_t; /* K6x Microntroller PMC module */
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#endif /* _K6xMPU_H_ */
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