290 lines
7.9 KiB
C
290 lines
7.9 KiB
C
/* pinmux.h - Freescale K64 pinmux header */
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/*
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* Copyright (c) 2016, Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file Header file for Freescale K64 pin multiplexing.
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*/
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#ifndef __INCLUDE_PINMUX_K64_H
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#define __INCLUDE_PINMUX_K64_H
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#define K64_PINMUX_NUM_PINS 32 /* # of I/O pins per port */
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/* Port Control Register offsets */
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#define K64_PINMUX_CTRL_OFFSET(pin) (pin * 4)
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/*
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* The following pin settings match the K64 PORT module's
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* Pin Control Register bit fields.
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*/
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/*
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* Pin interrupt configuration:
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* At reset, interrupts are disabled for all pins.
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*/
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#define K64_PINMUX_INT_MASK (0xF << 16) /* interrupt config. */
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#define K64_PINMUX_INT_DISABLE (0x0 << 16) /* disable interrupt */
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#define K64_PINMUX_INT_LOW (0x8 << 16) /* active-low interrupt */
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#define K64_PINMUX_INT_RISING (0x9 << 16) /* rising-edge interrupt */
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#define K64_PINMUX_INT_FALLING (0xA << 16) /* falling-edge interrupt */
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#define K64_PINMUX_INT_BOTH_EDGE (0xB << 16) /* either edge interrupt */
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#define K64_PINMUX_INT_HIGH (0xC << 16) /* active-high interrupt */
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/*
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* Pin function identification:
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* At reset, the setting for PTA0/1/2/3/4 is function 7;
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* the remaining pins are set to function 0.
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*/
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#define K64_PINMUX_ALT_MASK (0x7 << 8)
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#define K64_PINMUX_ALT_0 (0x0 << 8)
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#define K64_PINMUX_ALT_1 (0x1 << 8)
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#define K64_PINMUX_ALT_2 (0x2 << 8)
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#define K64_PINMUX_ALT_3 (0x3 << 8)
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#define K64_PINMUX_ALT_4 (0x4 << 8)
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#define K64_PINMUX_ALT_5 (0x5 << 8)
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#define K64_PINMUX_ALT_6 (0x6 << 8)
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#define K64_PINMUX_ALT_7 K64_PINMUX_ALT_MASK
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#define K64_PINMUX_FUNC_GPIO K64_PINMUX_ALT_1
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#define K64_PINMUX_FUNC_DISABLED K64_PINMUX_ALT_0
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#define K64_PINMUX_FUNC_ANALOG K64_PINMUX_ALT_0
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#define K64_PINMUX_FUNC_ETHERNET K64_PINMUX_ALT_4
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/*
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* Pin drive strength configuration, for output:
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* At reset, the setting for PTA0/1/2/3/4/5 is high drive strength;
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* the remaining pins are set to low drive strength.
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*/
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#define K64_PINMUX_DRV_STRN_MASK (0x1 << 6) /* drive strength select */
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#define K64_PINMUX_DRV_STRN_LOW (0x0 << 6) /* low drive strength */
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#define K64_PINMUX_DRV_STRN_HIGH (0x1 << 6) /* high drive strength */
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/*
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* Pin open drain configuration, for output:
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* At reset, open drain is disabled for all pins.
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*/
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#define K64_PINMUX_OPEN_DRN_MASK (0x1 << 5) /* open drain enable */
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#define K64_PINMUX_OPEN_DRN_DISABLE (0x0 << 5) /* disable open drain */
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#define K64_PINMUX_OPEN_DRN_ENABLE (0x1 << 5) /* enable open drain */
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/*
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* Pin slew rate configuration, for output:
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* At reset, fast slew rate is set for all pins.
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*/
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#define K64_PINMUX_SLEW_RATE_MASK (0x1 << 2) /* slew rate select */
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#define K64_PINMUX_SLEW_RATE_FAST (0x0 << 2) /* fast slew rate */
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#define K64_PINMUX_SLEW_RATE_SLOW (0x1 << 2) /* slow slew rate */
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/*
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* Pin pull-up/pull-down configuration, for input:
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* At reset, the setting for PTA1/2/3/4/5 is pull-up; PTA0 is pull-down;
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* pull-up/pull-down is disabled for the remaining pins.
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*/
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#define K64_PINMUX_PULL_EN_MASK (0x1 << 1) /* pullup/pulldown enable */
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#define K64_PINMUX_PULL_DISABLE (0x0 << 1) /* disable pullup/pulldown */
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#define K64_PINMUX_PULL_ENABLE (0x1 << 1) /* enable pullup/pulldown */
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#define K64_PINMUX_PULL_SEL_MASK (0x1 << 0) /* pullup/pulldown select */
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#define K64_PINMUX_PULL_DN (0x0 << 0) /* select pulldown */
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#define K64_PINMUX_PULL_UP (0x1 << 0) /* select pullup */
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/*
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* Pin identification, by port and pin
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*/
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#define K64_PIN_PTA0 0
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#define K64_PIN_PTA1 1
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#define K64_PIN_PTA2 2
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#define K64_PIN_PTA3 3
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#define K64_PIN_PTA4 4
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#define K64_PIN_PTA5 5
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#define K64_PIN_PTA6 6
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#define K64_PIN_PTA7 7
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#define K64_PIN_PTA8 8
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#define K64_PIN_PTA9 9
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#define K64_PIN_PTA10 10
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#define K64_PIN_PTA11 11
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#define K64_PIN_PTA12 12
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#define K64_PIN_PTA13 13
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#define K64_PIN_PTA14 14
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#define K64_PIN_PTA15 15
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#define K64_PIN_PTA16 16
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#define K64_PIN_PTA17 17
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#define K64_PIN_PTA18 18
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#define K64_PIN_PTA19 19
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#define K64_PIN_PTA20 20
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#define K64_PIN_PTA21 21
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#define K64_PIN_PTA22 22
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#define K64_PIN_PTA23 23
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#define K64_PIN_PTA24 24
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#define K64_PIN_PTA25 25
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#define K64_PIN_PTA26 26
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#define K64_PIN_PTA27 27
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#define K64_PIN_PTA28 28
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#define K64_PIN_PTA29 29
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#define K64_PIN_PTA30 30
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#define K64_PIN_PTA31 31
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#define K64_PIN_PTB0 32
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#define K64_PIN_PTB1 33
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#define K64_PIN_PTB2 34
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#define K64_PIN_PTB3 35
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#define K64_PIN_PTB4 36
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#define K64_PIN_PTB5 37
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#define K64_PIN_PTB6 38
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#define K64_PIN_PTB7 39
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#define K64_PIN_PTB8 40
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#define K64_PIN_PTB9 41
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#define K64_PIN_PTB10 42
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#define K64_PIN_PTB11 43
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#define K64_PIN_PTB12 44
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#define K64_PIN_PTB13 45
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#define K64_PIN_PTB14 46
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#define K64_PIN_PTB15 47
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#define K64_PIN_PTB16 48
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#define K64_PIN_PTB17 49
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#define K64_PIN_PTB18 50
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#define K64_PIN_PTB19 51
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#define K64_PIN_PTB20 52
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#define K64_PIN_PTB21 53
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#define K64_PIN_PTB22 54
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#define K64_PIN_PTB23 55
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#define K64_PIN_PTB24 56
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#define K64_PIN_PTB25 57
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#define K64_PIN_PTB26 58
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#define K64_PIN_PTB27 59
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#define K64_PIN_PTB28 60
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#define K64_PIN_PTB29 61
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#define K64_PIN_PTB30 62
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#define K64_PIN_PTB31 63
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#define K64_PIN_PTC0 64
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#define K64_PIN_PTC1 65
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#define K64_PIN_PTC2 66
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#define K64_PIN_PTC3 67
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#define K64_PIN_PTC4 68
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#define K64_PIN_PTC5 69
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#define K64_PIN_PTC6 70
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#define K64_PIN_PTC7 71
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#define K64_PIN_PTC8 72
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#define K64_PIN_PTC9 73
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#define K64_PIN_PTC10 74
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#define K64_PIN_PTC11 75
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#define K64_PIN_PTC12 76
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#define K64_PIN_PTC13 77
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#define K64_PIN_PTC14 78
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#define K64_PIN_PTC15 79
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#define K64_PIN_PTC16 80
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#define K64_PIN_PTC17 81
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#define K64_PIN_PTC18 82
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#define K64_PIN_PTC19 83
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#define K64_PIN_PTC20 84
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#define K64_PIN_PTC21 85
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#define K64_PIN_PTC22 86
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#define K64_PIN_PTC23 87
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#define K64_PIN_PTC24 88
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#define K64_PIN_PTC25 89
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#define K64_PIN_PTC26 90
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#define K64_PIN_PTC27 91
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#define K64_PIN_PTC28 92
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#define K64_PIN_PTC29 93
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#define K64_PIN_PTC30 94
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#define K64_PIN_PTC31 95
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#define K64_PIN_PTD0 96
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#define K64_PIN_PTD1 97
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#define K64_PIN_PTD2 98
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#define K64_PIN_PTD3 99
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#define K64_PIN_PTD4 100
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#define K64_PIN_PTD5 101
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#define K64_PIN_PTD6 102
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#define K64_PIN_PTD7 103
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#define K64_PIN_PTD8 104
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#define K64_PIN_PTD9 105
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#define K64_PIN_PTD10 106
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#define K64_PIN_PTD11 107
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#define K64_PIN_PTD12 108
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#define K64_PIN_PTD13 109
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#define K64_PIN_PTD14 110
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#define K64_PIN_PTD15 111
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#define K64_PIN_PTD16 112
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#define K64_PIN_PTD17 113
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#define K64_PIN_PTD18 114
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#define K64_PIN_PTD19 115
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#define K64_PIN_PTD20 116
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#define K64_PIN_PTD21 117
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#define K64_PIN_PTD22 118
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#define K64_PIN_PTD23 119
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#define K64_PIN_PTD24 120
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#define K64_PIN_PTD25 121
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#define K64_PIN_PTD26 122
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#define K64_PIN_PTD27 123
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#define K64_PIN_PTD28 124
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#define K64_PIN_PTD29 125
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#define K64_PIN_PTD30 126
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#define K64_PIN_PTD31 127
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#define K64_PIN_PTE0 128
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#define K64_PIN_PTE1 129
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#define K64_PIN_PTE2 130
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#define K64_PIN_PTE3 131
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#define K64_PIN_PTE4 132
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#define K64_PIN_PTE5 133
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#define K64_PIN_PTE6 134
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#define K64_PIN_PTE7 135
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#define K64_PIN_PTE8 136
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#define K64_PIN_PTE9 137
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#define K64_PIN_PTE10 138
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#define K64_PIN_PTE11 139
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#define K64_PIN_PTE12 140
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#define K64_PIN_PTE13 141
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#define K64_PIN_PTE14 142
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#define K64_PIN_PTE15 143
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#define K64_PIN_PTE16 144
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#define K64_PIN_PTE17 145
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#define K64_PIN_PTE18 146
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#define K64_PIN_PTE19 147
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#define K64_PIN_PTE20 148
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#define K64_PIN_PTE21 149
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#define K64_PIN_PTE22 150
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#define K64_PIN_PTE23 151
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#define K64_PIN_PTE24 152
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#define K64_PIN_PTE25 153
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#define K64_PIN_PTE26 154
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#define K64_PIN_PTE27 155
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#define K64_PIN_PTE28 156
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#define K64_PIN_PTE29 157
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#define K64_PIN_PTE30 158
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#define K64_PIN_PTE31 159
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int _fsl_k64_set_pin(uint32_t pin_id, uint32_t func);
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int _fsl_k64_get_pin(uint32_t pin_id, uint32_t *func);
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#endif /* __INCLUDE_PINMUX_K64_H */
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