67 lines
1.4 KiB
C
67 lines
1.4 KiB
C
/*
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* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief CMSIS interface file
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*
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* This header contains the interface to the ARM CMSIS Core headers.
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*/
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#ifndef ZEPHYR_MODULES_CMSIS_CMSIS_A_R_H_
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#define ZEPHYR_MODULES_CMSIS_CMSIS_A_R_H_
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#include <soc.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef __CR_REV
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#define __CR_REV 0U
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#endif
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#ifndef __CA_REV
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#define __CA_REV 0U
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#endif
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#ifndef __FPU_PRESENT
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#define __FPU_PRESENT CONFIG_CPU_HAS_FPU
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#endif
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#ifndef __MMU_PRESENT
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#define __MMU_PRESENT CONFIG_CPU_HAS_MMU
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#endif
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#ifdef __cplusplus
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}
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#endif
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#if defined(CONFIG_CPU_CORTEX_R4)
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#include <core_cr4.h>
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#elif defined(CONFIG_CPU_CORTEX_R5)
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#include <core_cr5.h>
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#elif defined(CONFIG_CPU_CORTEX_R7)
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#include <core_cr7.h>
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#elif defined(CONFIG_CPU_CORTEX_R52)
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#include <core_cr52.h>
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_A)
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/*
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* Any defines relevant for the proper inclusion of CMSIS' Cortex-A
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* Common Peripheral Access Layer (such as __CORTEX_A) which are not
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* covered by the Kconfig-based default assignments above must be
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* provided by each aarch32 Cortex-A SoC's header file (already in-
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* cluded above).
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*/
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#include <core_ca.h>
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#else
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#error "Unknown device"
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#endif
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#include "cmsis_core_a_r_ext.h"
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#endif /* ZEPHYR_MODULES_CMSIS_CMSIS_A_R_H_ */
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