zephyr/dts/arm/st/g0
Adrien MARTIN c1ae6e5b4e soc: stm32g0: add fdcan2
The STM32G0 soc has 2 CAN controllers. The 2nd on was not working
with zephyr yet as both controllers shares the same IRQ. Recently, the
shared irq system was integrated on now, both can controllers can work
on this chip. Shared interrupts must be enabled only if both can
controllers are enabled.

Signed-off-by: Adrien MARTIN <adrienmar@kickmaker.net>
2024-01-25 16:01:40 +00:00
..
stm32g0.dtsi
stm32g0_crypt.dtsi
stm32g0b0.dtsi
stm32g0b0Xe.dtsi
stm32g0b1.dtsi soc: stm32g0: add fdcan2 2024-01-25 16:01:40 +00:00
stm32g0b1Xb.dtsi
stm32g0b1Xc.dtsi
stm32g0b1Xe.dtsi
stm32g0c1.dtsi
stm32g0c1Xc.dtsi
stm32g0c1Xe.dtsi
stm32g030.dtsi
stm32g030X6.dtsi
stm32g030X8.dtsi
stm32g031.dtsi
stm32g031X4.dtsi
stm32g031X6.dtsi
stm32g031X8.dtsi
stm32g041.dtsi
stm32g041X6.dtsi
stm32g041X8.dtsi
stm32g050.dtsi
stm32g050X6.dtsi
stm32g050X8.dtsi
stm32g051.dtsi
stm32g051X6.dtsi
stm32g051X8.dtsi
stm32g061.dtsi
stm32g061X6.dtsi
stm32g061X8.dtsi
stm32g070.dtsi
stm32g070Xb.dtsi
stm32g071.dtsi
stm32g071X8.dtsi
stm32g071Xb.dtsi
stm32g081.dtsi
stm32g081Xb.dtsi