605 lines
14 KiB
Plaintext
605 lines
14 KiB
Plaintext
/*
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* Copyright (c) 2019-2021 Vestas Wind Systems A/S
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/clock/kinetis_pcc.h>
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#include <zephyr/dt-bindings/clock/kinetis_scg.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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/ {
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aliases {
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watchdog0 = &wdog;
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};
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chosen {
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zephyr,flash-controller = &ftfe;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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cpu-power-states = <&idle &stop &pstop1 &pstop2>;
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};
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power-states {
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idle: idle {
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compatible = "zephyr,power-state";
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power-state-name = "runtime-idle";
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};
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stop: stop {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <0>;
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};
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pstop1: pstop1 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <1>;
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};
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pstop2: pstop2 {
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compatible = "zephyr,power-state";
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power-state-name = "suspend-to-idle";
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substate-id = <2>;
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};
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};
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};
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temp0: temp0 {
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compatible = "nxp,kinetis-temperature";
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io-channels = <&adc0 26>, <&adc0 27>;
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io-channel-names = "SENSOR", "BANDGAP";
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bandgap-voltage = <1000000>;
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vtemp25 = <740500>;
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sensor-slope-cold = <1564>;
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sensor-slope-hot = <1564>;
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status = "disabled";
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};
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temp1: temp1 {
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compatible = "nxp,kinetis-temperature";
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io-channels = <&adc1 26>, <&adc1 27>;
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io-channel-names = "SENSOR", "BANDGAP";
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bandgap-voltage = <1000000>;
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vtemp25 = <740500>;
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sensor-slope-cold = <1564>;
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sensor-slope-hot = <1564>;
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status = "disabled";
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};
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temp2: temp2 {
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compatible = "nxp,kinetis-temperature";
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io-channels = <&adc2 26>, <&adc2 27>;
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io-channel-names = "SENSOR", "BANDGAP";
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bandgap-voltage = <1000000>;
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vtemp25 = <740500>;
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sensor-slope-cold = <1564>;
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sensor-slope-hot = <1564>;
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status = "disabled";
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};
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/* Dummy pinctrl node, filled with pin mux options at board level */
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pinctrl: pinctrl {
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compatible = "nxp,kinetis-pinctrl";
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status = "okay";
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};
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soc {
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edma: dma-controller@40008000 {
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compatible = "nxp,mcux-edma";
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dma-channels = <16>;
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dma-requests = <64>;
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nxp,mem2mem;
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reg = <0x40008000 0x1000>, <0x40021000 0x1000>;
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interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
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<4 0>, <5 0>, <6 0>, <7 0>,
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<8 0>, <9 0>, <10 0>, <11 0>,
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<12 0>, <13 0>, <14 0>, <15 0>,
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<16 0>;
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status = "disabled";
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#dma-cells = <2>;
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};
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mpu: mpu@4000d000 {
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compatible = "nxp,kinetis-mpu";
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reg = <0x4000d000 0x1000>;
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status = "disabled";
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};
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sim: sim@40048000 {
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compatible = "nxp,kinetis-ke1xf-sim";
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reg = <0x40048000 0x1000>;
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};
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scg: scg@40064000 {
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compatible = "nxp,kinetis-scg";
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reg = <0x40064000 0x1000>;
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#clock-cells = <1>;
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sosc_clk: sosc_clk {
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compatible = "fixed-clock";
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status = "disabled";
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#clock-cells = <0>;
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};
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sirc_clk: sirc_clk {
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compatible = "fixed-clock";
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clock-frequency = <8000000>;
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#clock-cells = <0>;
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};
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firc_clk: firc_clk {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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pll: pll {
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compatible = "fixed-factor-clock";
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clocks = <&sosc_clk>;
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clock-div = <1>;
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clock-mult = <16>;
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#clock-cells = <0>;
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};
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spll_clk: spll_clk {
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compatible = "fixed-factor-clock";
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clocks = <&pll>;
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clock-div = <2>;
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#clock-cells = <0>;
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};
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core_clk: core_clk {
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compatible = "fixed-factor-clock";
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clocks = <&firc_clk>;
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clock-div = <1>;
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#clock-cells = <0>;
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};
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bus_clk: bus_clk {
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compatible = "fixed-factor-clock";
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clocks = <&core_clk>;
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clock-div = <1>;
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#clock-cells = <0>;
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};
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slow_clk: slow_clk {
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compatible = "fixed-factor-clock";
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clocks = <&core_clk>;
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clock-div = <2>;
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#clock-cells = <0>;
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};
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clkout_clk: clkout_clk {
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compatible = "fixed-factor-clock";
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status = "disabled";
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clocks = <&firc_clk>;
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#clock-cells = <0>;
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};
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splldiv1_clk: splldiv1_clk {
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compatible = "fixed-factor-clock";
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clocks = <&spll_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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splldiv2_clk: splldiv2_clk {
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compatible = "fixed-factor-clock";
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clocks = <&spll_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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sircdiv1_clk: sircdiv1_clk {
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compatible = "fixed-factor-clock";
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clocks = <&sirc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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sircdiv2_clk: sircdiv2_clk {
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compatible = "fixed-factor-clock";
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clocks = <&sirc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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fircdiv1_clk: fircdiv1_clk {
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compatible = "fixed-factor-clock";
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clocks = <&firc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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fircdiv2_clk: fircdiv2_clk {
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compatible = "fixed-factor-clock";
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clocks = <&firc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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soscdiv1_clk: soscdiv1_clk {
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compatible = "fixed-factor-clock";
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clocks = <&sosc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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soscdiv2_clk: soscdiv2_clk {
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compatible = "fixed-factor-clock";
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clocks = <&sosc_clk>;
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clock-div = <0>;
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#clock-cells = <0>;
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};
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};
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pmc: pmc@4007d000 {
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reg = <0x4007d000 0x1000>;
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lpo: lpo128k {
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/* LPO clock */
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compatible = "fixed-clock";
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clock-frequency = <128000>;
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#clock-cells = <0>;
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};
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};
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pcc: pcc@40065000 {
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compatible = "nxp,kinetis-pcc";
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reg = <0x40065000 0x1000>;
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#clock-cells = <2>;
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};
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rtc: rtc@4003d000 {
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compatible = "nxp,kinetis-rtc";
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reg = <0x4003d000 0x1000>;
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interrupts = <46 0>, <47 0>;
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interrupt-names = "alarm", "seconds";
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clock-frequency = <32768>;
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prescaler = <32768>;
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};
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dac0: dac@4003f000 {
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compatible = "nxp,kinetis-dac32";
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reg = <0x4003f000 0x1000>;
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interrupts = <56 0>;
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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voltage-reference = <1>;
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buffered;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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lptmr0: lptmr@40040000 {
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compatible = "nxp,kinetis-lptmr";
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reg = <0x40040000 0x1000>;
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interrupts = <58 0>;
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clock-frequency = <128000>;
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prescaler = <1>;
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clk-source = <1>;
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};
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wdog: watchdog@40052000 {
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compatible = "nxp,kinetis-wdog32";
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reg = <0x40052000 0x1000>;
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interrupts = <22 0>;
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clocks = <&lpo>;
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clk-source = <1>;
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clk-divider = <256>;
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};
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pwt: pwt@40056000 {
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compatible = "nxp,kinetis-pwt";
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reg = <0x40056000 0x1000>;
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interrupts = <29 0>;
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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prescaler = <1>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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ftfe: flash-controller@40020000 {
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compatible = "nxp,kinetis-ftfe";
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reg = <0x40020000 0x1000>;
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interrupts = <18 0>, <19 0>;
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interrupt-names = "command-complete", "read-collision";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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lpuart0: uart@4006a000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006a000 0x1000>;
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interrupts = <31 0>, <32 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1a8 KINETIS_PCC_SRC_FIRC_ASYNC>;
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dmas = <&edma 1 2>, <&edma 2 3>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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lpuart1: uart@4006b000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006b000 0x1000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1ac KINETIS_PCC_SRC_FIRC_ASYNC>;
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dmas = <&edma 3 4>, <&edma 4 5>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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lpuart2: uart@4006c000 {
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compatible = "nxp,kinetis-lpuart";
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reg = <0x4006c000 0x1000>;
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interrupts = <35 0>, <36 0>;
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interrupt-names = "transmit", "receive";
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clocks = <&pcc 0x1b0 KINETIS_PCC_SRC_FIRC_ASYNC>;
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dmas = <&edma 5 6>, <&edma 5 7>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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lpi2c0: i2c@40066000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40066000 0x1000>;
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interrupts = <24 0>;
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clocks = <&pcc 0x198 KINETIS_PCC_SRC_FIRC_ASYNC>;
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status = "disabled";
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};
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lpi2c1: i2c@40067000 {
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compatible = "nxp,imx-lpi2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40067000 0x1000>;
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interrupts = <25 0>;
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clocks = <&pcc 0x19c KINETIS_PCC_SRC_FIRC_ASYNC>;
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status = "disabled";
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};
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lpspi0: spi@4002c000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x4002c000 0x1000>;
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interrupts = <26 0>;
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clocks = <&pcc 0xb0 KINETIS_PCC_SRC_FIRC_ASYNC>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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lpspi1: spi@4002d000 {
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compatible = "nxp,imx-lpspi";
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reg = <0x4002d000 0x1000>;
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interrupts = <27 0>;
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clocks = <&pcc 0xb4 KINETIS_PCC_SRC_FIRC_ASYNC>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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flexcan0: can@40024000 {
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compatible = "nxp,flexcan";
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reg = <0x40024000 0x1000>;
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interrupts = <78 0>, <79 0>, <80 0>, <81 0>;
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interrupt-names = "warning", "error", "wake-up",
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"mb-0-15";
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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clk-source = <1>;
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sample-point = <875>;
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status = "disabled";
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};
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flexcan1: can@40025000 {
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compatible = "nxp,flexcan";
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reg = <0x40025000 0x1000>;
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interrupts = <85 0>, <86 0>, <87 0>, <88 0>;
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interrupt-names = "warning", "error", "wake-up",
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"mb-0-15";
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clocks = <&scg KINETIS_SCG_BUS_CLK>;
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clk-source = <1>;
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sample-point = <875>;
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status = "disabled";
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};
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porta: pinmux@40049000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x40049000 0x1000>;
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clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>;
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};
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portb: pinmux@4004a000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004a000 0x1000>;
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clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>;
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};
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portc: pinmux@4004b000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004b000 0x1000>;
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clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>;
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};
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portd: pinmux@4004c000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004c000 0x1000>;
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clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>;
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};
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porte: pinmux@4004d000 {
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compatible = "nxp,kinetis-pinmux";
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reg = <0x4004d000 0x1000>;
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clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>;
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};
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gpioa: gpio@400ff000 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff000 0x40>;
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interrupts = <59 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porta>;
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};
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gpiob: gpio@400ff040 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff040 0x40>;
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interrupts = <60 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portb>;
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};
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gpioc: gpio@400ff080 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff080 0x40>;
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interrupts = <61 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portc>;
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};
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gpiod: gpio@400ff0c0 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff0c0 0x40>;
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interrupts = <62 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&portd>;
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};
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gpioe: gpio@400ff100 {
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compatible = "nxp,kinetis-gpio";
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status = "disabled";
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reg = <0x400ff100 0x40>;
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interrupts = <63 2>;
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gpio-controller;
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#gpio-cells = <2>;
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nxp,kinetis-port = <&porte>;
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};
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adc0: adc@4003b000 {
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compatible = "nxp,kinetis-adc12";
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reg = <0x4003b000 0x1000>;
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interrupts = <39 0>;
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clocks = <&pcc 0xec KINETIS_PCC_SRC_FIRC_ASYNC>;
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clk-source = <0>;
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clk-divider = <1>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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adc1: adc@40027000 {
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compatible = "nxp,kinetis-adc12";
|
|
reg = <0x40027000 0x1000>;
|
|
interrupts = <73 0>;
|
|
clocks = <&pcc 0x9c KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
clk-source = <0>;
|
|
clk-divider = <1>;
|
|
status = "disabled";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
adc2: adc@4003c000 {
|
|
compatible = "nxp,kinetis-adc12";
|
|
reg = <0x4003c000 0x1000>;
|
|
interrupts = <74 0>;
|
|
clocks = <&pcc 0xf0 KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
clk-source = <0>;
|
|
clk-divider = <1>;
|
|
status = "disabled";
|
|
#io-channel-cells = <1>;
|
|
};
|
|
|
|
ftm0: ftm@40038000 {
|
|
compatible = "nxp,kinetis-ftm";
|
|
reg = <0x40038000 0x1000>;
|
|
interrupts = <42 0>;
|
|
clocks = <&pcc 0xe0 KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
prescaler = <16>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ftm1: ftm@40039000 {
|
|
compatible = "nxp,kinetis-ftm";
|
|
reg = <0x40039000 0x1000>;
|
|
interrupts = <43 0>;
|
|
clocks = <&pcc 0xe4 KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
prescaler = <16>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ftm2: ftm@4003a000 {
|
|
compatible = "nxp,kinetis-ftm";
|
|
reg = <0x4003a000 0x1000>;
|
|
interrupts = <44 0>;
|
|
clocks = <&pcc 0xe8 KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
prescaler = <16>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ftm3: ftm@40026000 {
|
|
compatible = "nxp,kinetis-ftm";
|
|
reg = <0x40026000 0x1000>;
|
|
interrupts = <71 0>;
|
|
clocks = <&pcc 0x98 KINETIS_PCC_SRC_FIRC_ASYNC>;
|
|
prescaler = <16>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cmp0: cmp@40073000 {
|
|
compatible = "nxp,kinetis-acmp";
|
|
reg = <0x40073000 0x1000>;
|
|
interrupts = <40 0>;
|
|
clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
|
status = "disabled";
|
|
#io-channel-cells = <2>;
|
|
};
|
|
|
|
cmp1: cmp@40074000 {
|
|
compatible = "nxp,kinetis-acmp";
|
|
reg = <0x40074000 0x1000>;
|
|
interrupts = <41 0>;
|
|
clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
|
status = "disabled";
|
|
#io-channel-cells = <2>;
|
|
};
|
|
|
|
cmp2: cmp@40075000 {
|
|
compatible = "nxp,kinetis-acmp";
|
|
reg = <0x40075000 0x1000>;
|
|
interrupts = <70 0>;
|
|
clocks = <&scg KINETIS_SCG_BUS_CLK>;
|
|
status = "disabled";
|
|
#io-channel-cells = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&nvic {
|
|
arm,num-irq-priority-bits = <4>;
|
|
};
|