220 lines
4.9 KiB
C
220 lines
4.9 KiB
C
/*
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* Copyright (c) 2016 BayLibre, SAS
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef _STM32LX_I2C_H_
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#define _STM32LX_I2C_H_
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/* 35.6.1 Control register 1 (I2C_CR1) */
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union __cr1 {
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uint32_t val;
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struct {
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uint32_t pe :1 __packed;
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uint32_t txie :1 __packed;
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uint32_t rxie :1 __packed;
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uint32_t addrie :1 __packed;
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uint32_t nackie :1 __packed;
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uint32_t stopie :1 __packed;
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uint32_t tcie :1 __packed;
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uint32_t errie :1 __packed;
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uint32_t dnf :4 __packed;
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uint32_t anfoff :1 __packed;
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uint32_t rsvd__13 :1 __packed;
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uint32_t txdmaen :1 __packed;
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uint32_t rxdmaen :1 __packed;
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uint32_t sbc :1 __packed;
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uint32_t nostretch :1 __packed;
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uint32_t wupen :1 __packed;
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uint32_t gcen :1 __packed;
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uint32_t smbhen :1 __packed;
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uint32_t smbden :1 __packed;
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uint32_t alerten :1 __packed;
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uint32_t pecen :1 __packed;
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uint32_t rsvd__24_31 :8 __packed;
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} bit;
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};
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/* 35.6.2 Control register 2 (I2C_CR2) */
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union __cr2 {
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uint32_t val;
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struct {
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uint32_t sadd :10 __packed;
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uint32_t rd_wrn :1 __packed;
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uint32_t add10 :1 __packed;
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uint32_t head10r :1 __packed;
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uint32_t start :1 __packed;
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uint32_t stop :1 __packed;
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uint32_t nack :1 __packed;
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uint32_t nbytes :8 __packed;
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uint32_t reload :1 __packed;
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uint32_t autoend :1 __packed;
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uint32_t pecbyte :1 __packed;
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uint32_t rsvd__27_31 :5 __packed;
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} bit;
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};
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union __oar1 {
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uint32_t val;
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struct {
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uint32_t oa1 :10 __packed;
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uint32_t oa1mode :1 __packed;
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uint32_t rsvd__11_14 :4 __packed;
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uint32_t oa1en :1 __packed;
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uint32_t rsvd__16_31 :16 __packed;
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} bit;
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};
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union __oar2 {
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uint32_t val;
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struct {
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uint32_t rsvd__0 :1 __packed;
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uint32_t oa2 :7 __packed;
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uint32_t oa2msk :3 __packed;
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uint32_t rsvd__11_14 :4 __packed;
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uint32_t oa2en :1 __packed;
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uint32_t rsvd__16_31 :16 __packed;
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} bit;
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};
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union __timingr {
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uint32_t val;
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struct {
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uint32_t scll :8 __packed;
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uint32_t sclh :8 __packed;
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uint32_t sdadel :4 __packed;
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uint32_t scldel :4 __packed;
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uint32_t rsvd__24_27 :4 __packed;
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uint32_t presc :4 __packed;
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} bit;
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};
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union __timeoutr {
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uint32_t val;
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struct {
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uint32_t timeouta :12 __packed;
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uint32_t tidle :1 __packed;
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uint32_t rsvd__13_14 :1 __packed;
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uint32_t timouten :1 __packed;
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uint32_t timeoutb :12 __packed;
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uint32_t rsvd__28_30 :1 __packed;
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uint32_t texten :1 __packed;
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} bit;
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};
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union __isr {
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uint32_t val;
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struct {
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uint32_t txe :1 __packed;
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uint32_t txis :1 __packed;
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uint32_t rxne :1 __packed;
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uint32_t addr :1 __packed;
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uint32_t nackf :1 __packed;
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uint32_t stopf :1 __packed;
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uint32_t tc :1 __packed;
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uint32_t tcr :1 __packed;
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uint32_t berr :1 __packed;
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uint32_t arlo :1 __packed;
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uint32_t ovr :1 __packed;
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uint32_t pecerr :1 __packed;
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uint32_t timeout :1 __packed;
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uint32_t alert :1 __packed;
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uint32_t rsvd__14 :1 __packed;
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uint32_t busy :1 __packed;
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uint32_t dir :1 __packed;
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uint32_t addcode :7 __packed;
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uint32_t rsvd__24_31 :8 __packed;
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} bit;
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};
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union __icr {
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uint32_t val;
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struct {
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uint32_t rsvd__0_2 :3 __packed;
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uint32_t addr :1 __packed;
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uint32_t nack :1 __packed;
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uint32_t stop :1 __packed;
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uint32_t rsvd__6_7 :2 __packed;
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uint32_t berr :1 __packed;
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uint32_t arlo :1 __packed;
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uint32_t ovr :1 __packed;
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uint32_t pec :1 __packed;
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uint32_t timeout :1 __packed;
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uint32_t alert :1 __packed;
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uint32_t rsvd__14_31 :17 __packed;
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} bit;
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};
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union __pecr {
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uint32_t val;
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struct {
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uint32_t pec:8 __packed;
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uint32_t rsvd__9_31 :24 __packed;
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} bit;
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};
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union __dr {
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uint32_t val;
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struct {
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uint32_t data:8 __packed;
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uint32_t rsvd__9_31 :24 __packed;
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} bit;
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};
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/* 35.7.12 I2C register map */
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struct i2c_stm32lx {
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union __cr1 cr1;
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union __cr2 cr2;
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union __oar1 oar1;
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union __oar2 oar2;
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union __timingr timingr;
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union __timeoutr timeoutr;
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union __isr isr;
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union __icr icr;
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union __pecr pecr;
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union __dr rxdr;
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uint32_t txdr;
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};
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typedef void (*irq_config_func_t)(struct device *port);
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/* device config */
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struct i2c_stm32lx_config {
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void *base;
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irq_config_func_t irq_config_func;
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/* clock subsystem driving this peripheral */
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clock_control_subsys_t clock_subsys;
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};
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/* driver data */
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struct i2c_stm32lx_data {
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/* clock device */
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struct device *clock;
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/* Device config */
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union dev_config dev_config;
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/* ISR Sync */
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struct k_sem device_sync_sem;
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/* Current message data */
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struct {
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struct i2c_msg *msg;
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unsigned int len;
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uint8_t *buf;
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unsigned int is_err;
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unsigned int is_nack;
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unsigned int is_write;
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} current;
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};
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#endif /* _STM32LX_UART_H_ */
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