zephyr/arch/riscv/core
Karsten Koenig f0d4bdfe3f include: arch: riscv: rename global macro
SR and LR were used as global names for load and store RISC-V assembler
operations, colliding with other uses such as SR for STATUS REGISTER in
some peripherals. Renamed them to a longer more specific name to avoid
the collision.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2019-08-17 11:48:02 +02:00
..
offsets
CMakeLists.txt
cpu_idle.c
fatal.c
irq_manage.c
irq_offload.c
isr.S include: arch: riscv: rename global macro 2019-08-17 11:48:02 +02:00
prep_c.c
reset.S
swap.S include: arch: riscv: rename global macro 2019-08-17 11:48:02 +02:00
thread.c