zephyr/drivers/clock_control
Martí Bolívar 6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
..
CMakeLists.txt drivers/clock_control: Add clock_control on STM32L5 series 2020-05-08 00:34:34 -05:00
Kconfig
Kconfig.beetle
Kconfig.mcux_ccm
Kconfig.mcux_mcg
Kconfig.mcux_pcc
Kconfig.mcux_scg
Kconfig.mcux_sim
Kconfig.nrf
Kconfig.rv32m1
Kconfig.stm32 drivers/clock_control: stm32: msi: Enable MSI range config in PLL mode 2020-05-08 00:34:34 -05:00
Kconfig.stm32f0_f3
Kconfig.stm32f1
Kconfig.stm32f2_f4_f7
Kconfig.stm32g0
Kconfig.stm32g4
Kconfig.stm32h7
Kconfig.stm32l0_l1
Kconfig.stm32l4_l5_wb drivers/clock_control: Add clock_control on STM32L5 series 2020-05-08 00:34:34 -05:00
beetle_clock_control.c device: Fix structure attributes access 2020-05-08 23:07:44 +02:00
clock_control_mcux_ccm.c
clock_control_mcux_mcg.c
clock_control_mcux_pcc.c devicetree: allow access to all nodes 2020-05-08 19:37:18 -05:00
clock_control_mcux_scg.c
clock_control_mcux_sim.c devicetree: remove DT_HAS_NODE_STATUS_OKAY 2020-05-13 18:24:42 +02:00
clock_control_rv32m1_pcc.c devicetree: allow access to all nodes 2020-05-08 19:37:18 -05:00
clock_stm32_ll_common.c drivers/clock_control: stm32: msi: Enable MSI range config in PLL mode 2020-05-08 00:34:34 -05:00
clock_stm32_ll_common.h
clock_stm32_ll_h7.c
clock_stm32_ll_mp1.c
clock_stm32f0_f3.c
clock_stm32f1.c
clock_stm32f2_f4_f7.c
clock_stm32g0.c
clock_stm32g4.c
clock_stm32l0_l1.c
clock_stm32l4_l5_wb.c drivers/clock_control: Add clock_control on STM32L5 series 2020-05-08 00:34:34 -05:00
nrf_clock_calibration.c devicetree: remove DT_HAS_NODE_STATUS_OKAY 2020-05-13 18:24:42 +02:00
nrf_clock_calibration.h
nrf_power_clock.c device: Fix structure attributes access 2020-05-08 23:07:44 +02:00