71 lines
2.2 KiB
C
71 lines
2.2 KiB
C
/*
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* Copyright (c) 2019 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PCIE_PCIE_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_PCIE_PCIE_H_
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/*
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* Set the device's IRQ (in devicetree, or whatever) to PCIE_IRQ_DETECT
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* if the device doesn't support MSI and we don't/can't know the wired IRQ
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* allocated by the firmware ahead of time. Use of this functionality will
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* generally also require CONFIG_DYNAMIC_INTERRUPTS.
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*/
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#define PCIE_IRQ_DETECT 0xFFFFFFFU
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/*
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* We represent a PCI device ID as [31:16] device ID, [15:0] vendor ID. Not
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* coincidentally, this is same representation used in PCI configuration space.
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*/
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#define PCIE_ID_VEND_SHIFT 0U
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#define PCIE_ID_VEND_MASK 0xFFFFU
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#define PCIE_ID_DEV_SHIFT 16U
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#define PCIE_ID_DEV_MASK 0xFFFFU
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#define PCIE_ID(vend, dev) \
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((((vend) & PCIE_ID_VEND_MASK) << PCIE_ID_VEND_SHIFT) | \
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(((dev) & PCIE_ID_DEV_MASK) << PCIE_ID_DEV_SHIFT))
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#define PCIE_ID_TO_VEND(id) (((id) >> PCIE_ID_VEND_SHIFT) & PCIE_ID_VEND_MASK)
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#define PCIE_ID_TO_DEV(id) (((id) >> PCIE_ID_DEV_SHIFT) & PCIE_ID_DEV_MASK)
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#define PCIE_ID_NONE PCIE_ID(0xFFFF, 0xFFFF)
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#define PCIE_BDF_NONE 0xFFFFFFFFU
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/*
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* Since our internal representation of bus/device/function is arbitrary,
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* we choose the same format employed in the x86 Configuration Address Port:
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*
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* [23:16] bus number, [15:11] device number, [10:8] function number
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*
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* All other bits must be zero.
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*
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* The x86 (the only arch, at present, that supports PCI) takes advantage
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* of this shared format to avoid unnecessary layers of abstraction.
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*/
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#define PCIE_BDF_BUS_SHIFT 16U
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#define PCIE_BDF_BUS_MASK 0xFFU
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#define PCIE_BDF_DEV_SHIFT 11U
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#define PCIE_BDF_DEV_MASK 0x1FU
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#define PCIE_BDF_FUNC_SHIFT 8U
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#define PCIE_BDF_FUNC_MASK 0x7U
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#define PCIE_BDF(bus, dev, func) \
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((((bus) & PCIE_BDF_BUS_MASK) << PCIE_BDF_BUS_SHIFT) | \
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(((dev) & PCIE_BDF_DEV_MASK) << PCIE_BDF_DEV_SHIFT) | \
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(((func) & PCIE_BDF_FUNC_MASK) << PCIE_BDF_FUNC_SHIFT))
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#define PCIE_BDF_TO_BUS(bdf) (((bdf) >> PCIE_BDF_BUS_SHIFT) & PCIE_BDF_BUS_MASK)
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#define PCIE_BDF_TO_DEV(bdf) (((bdf) >> PCIE_BDF_DEV_SHIFT) & PCIE_BDF_DEV_MASK)
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#define PCIE_BDF_TO_FUNC(bdf) \
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(((bdf) >> PCIE_BDF_FUNC_SHIFT) & PCIE_BDF_FUNC_MASK)
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PCIE_PCIE_H_ */
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