86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
/*
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* Copyright (c) 2011-2014 Wind River Systems, Inc.
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* Copyright (c) 2020 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_X86_MMU_H
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#define ZEPHYR_INCLUDE_ARCH_X86_MMU_H
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#include <sys/util.h>
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/*
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* K_MEM_PARTITION_* defines
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*
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* Slated for removal when virtual memory is implemented, memory
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* mapping APIs will replace memory domains.
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*/
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#define Z_X86_MMU_RW BIT64(1) /** Read-Write */
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#define Z_X86_MMU_US BIT64(2) /** User-Supervisor */
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#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
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#define Z_X86_MMU_XD BIT64(63) /** Execute Disable */
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#else
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#define Z_X86_MMU_XD 0
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#endif
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/* For these we'll just use the same bits in the PTE */
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#define ARCH_DATA_PAGE_DIRTY ((uintptr_t)BIT(6))
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#define ARCH_DATA_PAGE_LOADED ((uintptr_t)BIT(0))
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#define ARCH_DATA_PAGE_ACCESSED ((uintptr_t)BIT(5))
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/* Use an PAT bit for this one since it's never set in a mapped PTE */
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#define ARCH_DATA_PAGE_NOT_MAPPED ((uintptr_t)BIT(7))
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/* Always true with 32-bit page tables, don't enable
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* CONFIG_EXECUTE_XOR_WRITE and expect it to work for you
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*/
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#define K_MEM_PARTITION_IS_EXECUTABLE(attr) (((attr) & Z_X86_MMU_XD) == 0)
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#define K_MEM_PARTITION_IS_WRITABLE(attr) (((attr) & Z_X86_MMU_RW) != 0)
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/* memory partition arch/soc independent attribute */
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#define K_MEM_PARTITION_P_RW_U_RW (Z_X86_MMU_RW | Z_X86_MMU_US | \
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Z_X86_MMU_XD)
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#define K_MEM_PARTITION_P_RW_U_NA (Z_X86_MMU_RW | Z_X86_MMU_XD)
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#define K_MEM_PARTITION_P_RO_U_RO (Z_X86_MMU_US | Z_X86_MMU_XD)
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#define K_MEM_PARTITION_P_RO_U_NA Z_X86_MMU_XD
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/* Execution-allowed attributes */
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#define K_MEM_PARTITION_P_RWX_U_RWX (Z_X86_MMU_RW | Z_X86_MMU_US)
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#define K_MEM_PARTITION_P_RWX_U_NA Z_X86_MMU_RW
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#define K_MEM_PARTITION_P_RX_U_RX Z_X86_MMU_US
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#define K_MEM_PARTITION_P_RX_U_NA (0)
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/* memory partition access permission mask */
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#define K_MEM_PARTITION_PERM_MASK (Z_X86_MMU_RW | Z_X86_MMU_US | \
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Z_X86_MMU_XD)
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#ifndef _ASMLANGUAGE
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#include <sys/slist.h>
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/* Page table entry data type at all levels. Defined here due to
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* k_mem_partition_attr_t, eventually move to private x86_mmu.h
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*/
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#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
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typedef uint64_t pentry_t;
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#else
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typedef uint32_t pentry_t;
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#endif
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typedef pentry_t k_mem_partition_attr_t;
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struct arch_mem_domain {
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#ifdef CONFIG_X86_PAE
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/* 4-entry, 32-byte top-level PDPT */
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pentry_t pdpt[4];
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#endif
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/* Pointer to top-level structure, either a PML4, PDPT, PD */
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pentry_t *ptables;
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/* Linked list of all active memory domains */
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sys_snode_t node;
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#ifdef CONFIG_X86_PAE
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} __aligned(32);
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#else
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};
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#endif /* CONFIG_X86_PAE */
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_X86_MMU_H */
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