226 lines
5.3 KiB
Plaintext
226 lines
5.3 KiB
Plaintext
/*
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* Copyright (c) 2020 ITE Corporation. All Rights Reserved.
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* Copyright (c) 2019-2020 Jyunlin Chen <jyunlin.chen@ite.com.tw>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <dt-bindings/irq.h>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "ite,riscv-ite";
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device_type = "cpu";
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reg = <0>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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flashctrl: flash-controller@80000000 {
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compatible = "ite,it8xxx2-flash-controller";
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reg = <0x80000000 0x100>;
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label = "fspi";
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@80000000 {
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compatible = "soc-nv-flash";
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reg = <0x80000000 DT_SIZE_K(512)>;
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erase-block-size = <1024>;
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write-block-size = <1>;
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};
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};
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pinmux: pinmux@f016f0 {
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compatible = "ite,it8xxx2-pinmux";
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reg = <0x00f016f0 0x0010>;
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};
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sram0: memory@80080000 {
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compatible = "mmio-sram";
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reg = <0x80080000 DT_SIZE_K(60)>;
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};
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intc: interrupt-controller@f03f00 {
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#interrupt-cells = <2>;
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compatible = "ite,it8xxx2-intc";
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interrupt-controller;
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reg = <0x00f03f00 0x0100>;
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};
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uart1: uart@f02700 {
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compatible = "ns16550";
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reg = <0x00f02700 0x0020>;
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label = "console";
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current-speed = <115200>;
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clock-frequency = <1804800>;
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interrupts = <38 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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};
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uart2: uart@f02800 {
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compatible = "ns16550";
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reg = <0x00f02800 0x0020>;
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label = "UART_2";
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current-speed = <460800>;
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clock-frequency = <1804800>;
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interrupts = <39 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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};
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timer: timer@f01f00 {
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compatible = "ite,it8xxx2-timer";
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reg = <0x00f01f00 0x0062>;
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label = "sys_clock";
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interrupts = <0 IRQ_TYPE_NONE
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30 IRQ_TYPE_EDGE_RISING
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58 IRQ_TYPE_EDGE_RISING
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155 IRQ_TYPE_EDGE_FALLING
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156 IRQ_TYPE_EDGE_FALLING
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157 IRQ_TYPE_EDGE_FALLING
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158 IRQ_TYPE_EDGE_FALLING
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159 IRQ_TYPE_EDGE_FALLING
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80 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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};
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gpiob: gpio@f01602 {
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compatible = "ite,it8xxx2-gpio";
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reg = <0x00f01602 0x0001>;
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ngpios = <8>;
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label = "GPDRB";
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status = "disabled";
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gpio-controller;
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interrupts = <106 IRQ_TYPE_LEVEL_HIGH
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107 IRQ_TYPE_LEVEL_HIGH
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92 IRQ_TYPE_LEVEL_HIGH
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108 IRQ_TYPE_LEVEL_HIGH
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99 IRQ_TYPE_LEVEL_HIGH
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109 IRQ_TYPE_LEVEL_HIGH
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110 IRQ_TYPE_LEVEL_HIGH
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111 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&intc>;
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#gpio-cells = <2>;
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};
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gpiof: gpio@f01606 {
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compatible = "ite,it8xxx2-gpio";
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reg = <0x00f01606 0x0001>;
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ngpios = <8>;
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label = "GPDRF";
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status = "disabled";
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gpio-controller;
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interrupts = <101 IRQ_TYPE_LEVEL_HIGH
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102 IRQ_TYPE_LEVEL_HIGH
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103 IRQ_TYPE_LEVEL_HIGH
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104 IRQ_TYPE_LEVEL_HIGH
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52 IRQ_TYPE_LEVEL_HIGH
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53 IRQ_TYPE_LEVEL_HIGH
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54 IRQ_TYPE_LEVEL_HIGH
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55 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&intc>;
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#gpio-cells = <2>;
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};
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gpiom: gpio@f0160D {
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compatible = "ite,it8xxx2-gpio";
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reg = <0x00f0160D 0x0001>;
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ngpios = <8>;
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label = "GPDRM";
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status = "disabled";
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gpio-controller;
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interrupt-parent = <&intc>;
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#gpio-cells = <2>;
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};
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spi0:spi@f02600 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ite,it8xxx2-sspi";
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reg = <0x00f02600 0x40>;
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label = "SPI0";
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interrupt-parent = <&intc>;
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interrupts = <37 IRQ_TYPE_EDGE_RISING>;
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clock-frequency = <115200>;
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};
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spi1:spi@f02640 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "ite,it8xxx2-sspi";
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reg = <0x00f02640 0x40>;
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label = "SPI1";
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interrupts = <37 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&intc>;
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status = "okay";
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};
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i2c0: i2c@f01c40 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f01c40 0x0040>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_0";
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port-num = <0>;
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};
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i2c1: i2c@f01c80 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f01c80 0x0040>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_1";
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port-num = <1>;
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};
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i2c2: i2c@f01cc0 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f01cc0 0x0040>;
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interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_2";
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port-num = <2>;
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};
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i2c3: i2c@f03680 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f03680 0x0080>;
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interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_3";
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port-num = <3>;
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};
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i2c4: i2c@f03500 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f03500 0x0080>;
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interrupts = <152 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_4";
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port-num = <4>;
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};
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i2c5: i2c@f03580 {
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compatible = "ite,it8xxx2-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x00f03580 0x0080>;
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interrupts = <153 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&intc>;
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status = "disabled";
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label = "I2C_5";
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port-num = <5>;
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};
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};
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};
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