Julien Delayen f540cbc5c5 power: Add ARC power states and update sample ... Add Low Power States support to the power shim layer and show the usage in the quark_se sample. States are defined as follow: - SYS_POWER_STATE_CPU_LPS: SS2 with LPSS enabled - SYS_POWER_STATE_CPU_LPS_1: SS2 with LPSS disabled - SYS_POWER_STATE_CPU_LPS_2: SS1 with LPSS disabled Jira: ZEP-994 Change-Id: Ie4b93f6e539cb53fc035be00280b66b2cb0d9fea Signed-off-by: Julien Delayen <julien.delayen@intel.com>		2016-11-11 03:28:54 +00:00
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core	arches: use new kernel APIs	2016-11-09 20:49:40 +00:00
include	arc: cache.h support added for em7d and em11d SOC	2016-11-07 18:53:49 +00:00
soc	power: Add ARC power states and update sample	2016-11-11 03:28:54 +00:00
Kbuild	new SoC naming convention	2016-04-18 21:24:59 +00:00
Kconfig	arc: cache.h support added for em7d and em11d SOC	2016-11-07 18:53:49 +00:00
Makefile	build: Introduce concept of SoC specific build flags	2016-05-27 10:04:29 -05:00
defconfig	arc: Remove nonexistant Kconfig sybmol from defconfig	2016-07-27 17:14:54 +00:00