Iuliana Prodan a6364da1a3 arch: xtensa: add workaround for small vector table entries ... For some platforms, like NXP's IMX8 or Mediatek's MT8195, the size of an interrupt vector table entry is 0x1C bytes, less than usual (0x30 for Intel's platforms). So, the interrupt handlers don't fit in the vector table entries. I've added a small indirection to bypass this size constraint and moved the default handlers to the end of vector table, renaming them to _Level\LVL\()VectorHelper. For this, I've added a generic configuration - XTENSA_SMALL_VECTOR_TABLE_ENTRY. Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>		2021-09-10 10:59:44 -04:00
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arc	ARC: MWDT: get rid of MWDT startup libs	2021-09-01 17:08:32 -04:00
arm	arch: arm: core: aarch32: fix regression introduced with Cortex-R	2021-09-09 19:49:37 -04:00
arm64	linker: align _image_text_start/end/size linker symbols name	2021-08-28 08:48:03 -04:00
common	arch: linker: specify intList section in the IDT_LIST region	2021-08-30 08:54:23 -04:00
nios2	…
posix	…
riscv	riscv: Don't reschedule on back-to-back interrupts	2021-09-03 12:20:03 -04:00
sparc	…
x86	x86: x86-64: add arch_float_en-/dis-able() functions	2021-09-03 10:00:02 -04:00
xtensa	arch: xtensa: add workaround for small vector table entries	2021-09-10 10:59:44 -04:00
CMakeLists.txt	…
Kconfig	kernel: demand_paging: allow reserving page frames	2021-08-26 21:16:22 -04:00