78 lines
2.5 KiB
Plaintext
78 lines
2.5 KiB
Plaintext
# Raytac MDBT53-DB-40 nRF5340 board configuration
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# Copyright (c) 2019-2020 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS
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# Code Partition:
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#
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# For the secure version of the board the firmware is linked at the beginning
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# of the flash, or into the code-partition defined in DT if it is intended to
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# be loaded by MCUboot. If the secure firmware is to be combined with a non-
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# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
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# be restricted to the size of its code partition.
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#
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# For the non-secure version of the board, the firmware
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# must be linked into the code-partition (non-secure) defined in DT, regardless.
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# Apply this configuration below by setting the Kconfig symbols used by
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# the linker according to the information extracted from DT partitions.
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# SRAM Partition:
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#
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# If the secure firmware is to be combined with a non-secure image
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# (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
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# be restricted to the secure image SRAM partition (sram-secure-partition).
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# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole zephyr,sram
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# may be used by the image.
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#
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# For the non-secure version of the board, the firmware image SRAM is
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# always restricted to the allocated non-secure SRAM partition.
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#
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
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if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config SRAM_SIZE
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default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM_PARTITION),0,K)
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endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS
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choice BT_HCI_BUS_TYPE
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default BT_HCI_IPC if BT
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endchoice
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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default 4096 if BT_HCI_IPC
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endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP || BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUAPP_NS
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config IPM_NRFX
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default IPM
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config MBOX_NRFX_IPC
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default MBOX
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if BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET
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config BT_CTLR
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default y if BT
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endif # BOARD_RAYTAC_MDBT53_DB_40_NRF5340_CPUNET
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