181 lines
5.2 KiB
ReStructuredText
181 lines
5.2 KiB
ReStructuredText
.. _nucleo_f412zg_board:
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ST Nucleo F412ZG
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################
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Overview
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********
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The Nucleo F412ZG board features an ARM Cortex-M4 based STM32F412ZG MCU
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with a wide range of connectivity support and configurations. Here are
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some highlights of the Nucleo F412ZG board:
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- STM32 microcontroller in LQFP144 package
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- Two types of extension resources:
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- ST Zio connector including: support for Arduino* Uno V3 connectivity
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(A0 to A5, D0 to D15) and additional signals exposing a wide range of
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peripherals
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- ST morpho extension pin headers for full access to all STM32 I/Os
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- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
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- Flexible board power supply:
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- 5 V from ST-LINK/V2-1 USB VBUS
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- External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
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connectors, 5 V on ST morpho connector
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- Three user LEDs
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- Two push-buttons: USER and RESET
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.. image:: img/Nucleo144_perf_logo_1024.png
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:width: 720px
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:align: center
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:height: 720px
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:alt: Nucleo F412ZG
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More information about the board can be found at the `Nucleo F412ZG website`_.
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Hardware
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********
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Nucleo F412ZG provides the following hardware components:
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- STM32F412ZGT6 in LQFP144 package
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- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
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- 100 MHz max CPU frequency
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- VDD from 1.7 V to 3.6 V
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- 1 MB Flash
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- 256 KB SRAM
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- GPIO with external interrupt capability
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- 12-bit ADC with 16 channels, with FIFO and burst support
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- RTC
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- 14 General purpose timers
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- 2 watchdog timers (independent and window)
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- SysTick timer
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- USART/UART (4)
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- I2C (4)
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- SPI (5)
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- SDIO
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- USB 2.0 OTG FS
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- DMA Controller
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- CRC calculation unit
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More information about STM32F412ZG can be found here:
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- `STM32F412ZG on www.st.com`_
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- `STM32F412 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_412zg board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| USB | on-chip | usb |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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``boards/arm/nucleo_f412zg/nucleo_f412zg_defconfig``
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Connections and IOs
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===================
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Nucleo F412ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Available pins:
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---------------
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.. image:: img/nucleo_f412zg_zio_left.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F412ZG ZIO connectors (left)
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.. image:: img/nucleo_f412zg_zio_right.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F412ZG ZIO connectors (right)
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.. image:: img/nucleo_f412zg_morpho_left.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F412ZG Morpho connectors (left)
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.. image:: img/nucleo_f412zg_morpho_right.png
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:width: 720px
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:align: center
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:height: 540px
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:alt: Nucleo F412ZG Morpho connectors (right)
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For more details please refer to `STM32 Nucleo-144 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_3_TX : PD8
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- UART_3_RX : PD9
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- PWM_2_CH1 : PA0
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- USER_PB : PC13
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- LD1 : PB0
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- LD2 : PB7
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- LD3 : PB14
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- I2C1 SCL : PB8
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- I2C1 SDA : PB9
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- USB DM : PA11
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- USB DP : PA12
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System Clock
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------------
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Nucleo F412ZG System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz,
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driven by 8MHz high speed external clock.
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Serial Port
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-----------
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Nucleo F412ZG board has 4 UARTs. The Zephyr console output is assigned to UART3.
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Default settings are 115200 8N1.
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Network interface
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-----------------
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Ethernet over USB is configured as the default network interface
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Programming and Debugging
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*************************
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Nucleo F412ZG board includes an ST-LINK/V2-1 embedded debug tool interface.
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This interface is supported by the openocd version included in Zephyr SDK.
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.. _Nucleo F412ZG website:
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http://www.st.com/en/evaluation-tools/nucleo-f412zg.html
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.. _STM32 Nucleo-144 board User Manual:
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http://www.st.com/resource/en/user_manual/dm00244518.pdf
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.. _STM32F412ZG on www.st.com:
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http://www.st.com/en/microcontrollers/stm32f412zg.html
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.. _STM32F412 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00180369.pdf
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