38 lines
952 B
YAML
38 lines
952 B
YAML
# Copyright (c) 2022, Google Inc
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# SPDX-License-Identifier: Apache-2.0
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description: |
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STM32 Reset and Clock Control (RCC) node.
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This node is in charge of reset control for AHB (Advanced High Performance)
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and APB (Advanced Peripheral) bus domains.
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To specify the reset line in a peripheral, the standard resets property needs
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to be used, e.g.:
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usart1: serial@xxx {
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...
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/* Cell contains information about RCU register offset and bit */
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resets = <&rctl STM32_RESET(ABP2, 4U)>;
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...
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};
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RCC reset cells are available in
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include/zephyr/dts-bindings/reset/stm32{soc_family}_reset.h header files.
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compatible: "st,stm32-rcc-rctl"
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include: [reset-controller.yaml, base.yaml]
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properties:
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"#reset-cells":
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const: 1
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set-bit-to-deassert:
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type: boolean
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description: |
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Indicates if the driver should set bit in clear register to
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deassert reset.
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reset-cells:
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- id
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