60 lines
1.2 KiB
ArmAsm
60 lines
1.2 KiB
ArmAsm
/*
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* Copyright (c) 2016 Cadence Design Systems, Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ISR table for static ISR declarations for XTENSA
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*
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* Software ISR table for XTENSA
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*/
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#include <toolchain.h>
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#include <sections.h>
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#include <arch/cpu.h>
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#include <xtensa/config/core.h>
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/*
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* Xtensa assembly code uses xt_unhandled_interrupt for default IRQ handler.
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*/
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#define _irq_spurious xt_unhandled_interrupt
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/*
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* enable preprocessor features, such
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* as %expr - evaluate the expression and use it as a string
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*/
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.altmacro
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/*
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* Define an ISR table entry
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* Define symbol as weak and give the section .gnu.linkonce.d
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* prefix. This allows linker overload the symbol and the
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* whole section by the one defined by a device driver
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*/
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.macro _isr_table_entry_declare index
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WDATA(_isr_irq\index)
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.section .gnu.linkonce.d.isr_irq\index
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_isr_irq\index: .word 0xABAD1DEA, _irq_spurious
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.endm
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/*
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* Declare the ISR table
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*/
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.macro _isr_table_declare from, to
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counter = \from
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.rept (\to - \from)
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_isr_table_entry_declare %counter
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counter = counter + 1
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.endr
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.endm
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GTEXT(_irq_spurious)
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GDATA(_sw_isr_table)
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.section .isr_irq0
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.align
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_sw_isr_table:
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_isr_table_declare 0 XCHAL_NUM_INTERRUPTS
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