57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
# Copyright 2022-2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_RW6XX
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select ARM
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select CPU_CORTEX_M33
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select CPU_CORTEX_M_HAS_DWT
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select CLOCK_CONTROL
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select SOC_RESET_HOOK
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select CPU_HAS_ARM_SAU
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select CPU_HAS_ARM_MPU
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select CPU_HAS_FPU
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select HAS_MCUX_OS_TIMER
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select ARM_TRUSTZONE_M
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select CPU_CORTEX_M_HAS_SYSTICK
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select HAS_MCUX
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select HAS_MCUX_FLEXCOMM
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select HAS_MCUX_CACHE
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select HAS_PM
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select HAS_NXP_MONOLITHIC_BT
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select SOC_EARLY_INIT_HOOK
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if SOC_SERIES_RW6XX
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menuconfig NXP_RW6XX_BOOT_HEADER
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bool "Create boot header"
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default y if !BOOTLOADER_MCUBOOT
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help
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Create data structures required by the boot ROM to boot the
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application from an external flash device.
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if NXP_RW6XX_BOOT_HEADER
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rsource "../common/Kconfig.rom_loader"
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config FLASH_CONFIG_OFFSET
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hex "Flash config data offset"
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default 0x400
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help
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The flash config offset provides the boot ROM with the on-board
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flash type and parameters. The boot ROM requires a fixed flash conifg
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offset for FlexSPI device.
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config IMAGE_VECTOR_TABLE_OFFSET
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hex "Image vector table offset"
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default 0x1000
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help
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The Image Vector Table (IVT) provides the boot ROM with pointers to
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the application entry point and device configuration data. The boot
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ROM requires a fixed IVT offset for each type of boot device.
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endif # NXP_RW6XX_BOOT_HEADER
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rsource "../common/Kconfig.flexspi_xip"
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endif # SOC_SERIES_RW6XX
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