177 lines
4.4 KiB
C
177 lines
4.4 KiB
C
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/sensor.h>
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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#include <zephyr/drivers/i2c.h>
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#endif
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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#include <zephyr/drivers/spi.h>
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#endif
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/kernel.h>
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#define FXAS21002_BUS_I2C (1<<0)
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#define FXAS21002_BUS_SPI (1<<1)
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#define FXAS21002_REG_STATUS 0x00
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#define FXAS21002_REG_OUTXMSB 0x01
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#define FXAS21002_REG_INT_SOURCE 0x0b
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#define FXAS21002_REG_WHOAMI 0x0c
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#define FXAS21002_REG_CTRLREG0 0x0d
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#define FXAS21002_REG_CTRLREG1 0x13
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#define FXAS21002_REG_CTRLREG2 0x14
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#define FXAS21002_REG_CTRLREG3 0x15
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#define FXAS21002_INT_SOURCE_DRDY_MASK (1 << 0)
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#define FXAS21002_CTRLREG0_FS_MASK (3 << 0)
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#define FXAS21002_CTRLREG1_DR_SHIFT 2
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#define FXAS21002_CTRLREG1_POWER_MASK (3 << 0)
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#define FXAS21002_CTRLREG1_DR_MASK (7 << FXAS21002_CTRLREG1_DR_SHIFT)
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#define FXAS21002_CTRLREG1_RST_MASK (1 << 6)
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#define FXAS21002_CTRLREG2_CFG_EN_MASK (1 << 2)
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#define FXAS21002_CTRLREG2_CFG_DRDY_MASK (1 << 3)
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#define FXAS21002_MAX_NUM_CHANNELS 3
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#define FXAS21002_BYTES_PER_CHANNEL 2
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#define FXAS21002_MAX_NUM_BYTES (FXAS21002_BYTES_PER_CHANNEL * \
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FXAS21002_MAX_NUM_CHANNELS)
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enum fxas21002_power {
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FXAS21002_POWER_STANDBY = 0,
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FXAS21002_POWER_READY = 1,
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FXAS21002_POWER_ACTIVE = 3,
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};
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enum fxas21002_range {
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FXAS21002_RANGE_2000DPS = 0,
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FXAS21002_RANGE_1000DPS,
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FXAS21002_RANGE_500DPS,
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FXAS21002_RANGE_250DPS,
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};
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enum fxas21002_channel {
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FXAS21002_CHANNEL_GYRO_X = 0,
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FXAS21002_CHANNEL_GYRO_Y,
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FXAS21002_CHANNEL_GYRO_Z,
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};
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struct fxas21002_io_ops {
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int (*read)(const struct device *dev,
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uint8_t reg,
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void *data,
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size_t length);
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int (*byte_read)(const struct device *dev,
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uint8_t reg,
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uint8_t *byte);
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int (*byte_write)(const struct device *dev,
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uint8_t reg,
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uint8_t byte);
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int (*reg_field_update)(const struct device *dev,
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uint8_t reg,
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uint8_t mask,
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uint8_t val);
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};
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union fxas21002_bus_cfg {
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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struct spi_dt_spec spi;
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#endif
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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struct i2c_dt_spec i2c;
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#endif
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};
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struct fxas21002_config {
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const union fxas21002_bus_cfg bus_cfg;
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const struct fxas21002_io_ops *ops;
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#ifdef CONFIG_FXAS21002_TRIGGER
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struct gpio_dt_spec int_gpio;
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#endif
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struct gpio_dt_spec reset_gpio;
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uint8_t whoami;
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enum fxas21002_range range;
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uint8_t dr;
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uint8_t inst_on_bus;
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};
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struct fxas21002_data {
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struct k_sem sem;
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#ifdef CONFIG_FXAS21002_TRIGGER
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const struct device *dev;
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struct gpio_callback gpio_cb;
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sensor_trigger_handler_t drdy_handler;
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const struct sensor_trigger *drdy_trig;
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#endif
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#ifdef CONFIG_FXAS21002_TRIGGER_OWN_THREAD
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K_KERNEL_STACK_MEMBER(thread_stack, CONFIG_FXAS21002_THREAD_STACK_SIZE);
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struct k_thread thread;
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struct k_sem trig_sem;
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#endif
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#ifdef CONFIG_FXAS21002_TRIGGER_GLOBAL_THREAD
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struct k_work work;
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#endif
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int16_t raw[FXAS21002_MAX_NUM_CHANNELS];
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};
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int fxas21002_get_power(const struct device *dev, enum fxas21002_power *power);
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int fxas21002_set_power(const struct device *dev, enum fxas21002_power power);
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uint32_t fxas21002_get_transition_time(enum fxas21002_power start,
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enum fxas21002_power end,
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uint8_t dr);
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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int fxas21002_byte_write_spi(const struct device *dev,
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uint8_t reg,
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uint8_t byte);
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int fxas21002_byte_read_spi(const struct device *dev,
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uint8_t reg,
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uint8_t *byte);
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int fxas21002_reg_field_update_spi(const struct device *dev,
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uint8_t reg,
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uint8_t mask,
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uint8_t val);
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int fxas21002_read_spi(const struct device *dev,
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uint8_t reg,
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void *data,
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size_t length);
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#endif
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(i2c)
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int fxas21002_byte_write_i2c(const struct device *dev,
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uint8_t reg,
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uint8_t byte);
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int fxas21002_byte_read_i2c(const struct device *dev,
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uint8_t reg,
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uint8_t *byte);
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int fxas21002_reg_field_update_i2c(const struct device *dev,
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uint8_t reg,
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uint8_t mask,
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uint8_t val);
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int fxas21002_read_i2c(const struct device *dev,
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uint8_t reg,
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void *data,
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size_t length);
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#endif
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#if CONFIG_FXAS21002_TRIGGER
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int fxas21002_trigger_init(const struct device *dev);
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int fxas21002_trigger_set(const struct device *dev,
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const struct sensor_trigger *trig,
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sensor_trigger_handler_t handler);
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#endif
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