242 lines
6.8 KiB
C
242 lines
6.8 KiB
C
/*
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* Copyright (c) 2023 Zephyr Project
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc13xx_cc26xx_timer_pwm
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/pwm.h>
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#include <driverlib/gpio.h>
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#include <driverlib/prcm.h>
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#include <driverlib/timer.h>
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#include <inc/hw_memmap.h>
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#include <inc/hw_types.h>
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#include <ti/drivers/Power.h>
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#include <ti/drivers/power/PowerCC26XX.h>
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#include <zephyr/logging/log.h>
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#define LOG_MODULE_NAME pwm_cc13xx_cc26xx_timer
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LOG_MODULE_REGISTER(LOG_MODULE_NAME, CONFIG_PWM_LOG_LEVEL);
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/* TODO: Clock frequency can be settable via KConfig, see TOP:PRCM:GPTCLKDIV */
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#define CPU_FREQ ((uint32_t)DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency))
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/* GPT peripherals in 16 bit mode have maximum 24 counter bits incl. the
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* prescaler. Count is set to (2^24 - 2) to allow for a glitch free 100% duty
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* cycle at max. period count.
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*/
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#define PWM_COUNT_MAX 0xFFFFFE
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#define PWM_INITIAL_PERIOD PWM_COUNT_MAX
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#define PWM_INITIAL_DUTY 0U /* initially off */
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struct pwm_cc13xx_cc26xx_data {
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};
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struct pwm_cc13xx_cc26xx_config {
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const uint32_t gpt_base; /* GPT register base address */
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const struct pinctrl_dev_config *pcfg;
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LOG_INSTANCE_PTR_DECLARE(log);
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};
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static void write_value(const struct pwm_cc13xx_cc26xx_config *config, uint32_t value,
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uint32_t prescale_register, uint32_t value_register)
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{
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/* Upper byte represents the prescaler value. */
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uint8_t prescaleValue = 0xff & (value >> 16);
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HWREG(config->gpt_base + prescale_register) = prescaleValue;
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/* The remaining bytes represent the load / match value. */
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HWREG(config->gpt_base + value_register) = value & 0xffff;
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}
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static int set_period_and_pulse(const struct pwm_cc13xx_cc26xx_config *config, uint32_t period,
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uint32_t pulse)
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{
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uint32_t match_value = pulse;
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if (pulse == 0U) {
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TimerDisable(config->gpt_base, TIMER_B);
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#ifdef CONFIG_PM
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Power_releaseConstraint(PowerCC26XX_DISALLOW_STANDBY);
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#endif
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match_value = period + 1;
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}
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/* Fail if period is out of range */
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if ((period > PWM_COUNT_MAX) || (period == 0)) {
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LOG_ERR("Period (%d) is out of range.", period);
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return -EINVAL;
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}
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/* Compare to new period and fail if invalid */
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if (period < (match_value - 1) || (match_value < 0)) {
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LOG_ERR("Period (%d) is shorter than pulse (%d).", period, pulse);
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return -EINVAL;
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}
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/* Store new period and update timer */
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write_value(config, period, GPT_O_TBPR, GPT_O_TBILR);
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write_value(config, match_value, GPT_O_TBPMR, GPT_O_TBMATCHR);
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if (pulse > 0U) {
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#ifdef CONFIG_PM
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Power_setConstraint(PowerCC26XX_DISALLOW_STANDBY);
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#endif
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TimerEnable(config->gpt_base, TIMER_B);
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}
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LOG_DBG("Period and pulse successfully set.");
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return 0;
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}
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static int set_cycles(const struct device *dev, uint32_t channel, uint32_t period, uint32_t pulse,
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pwm_flags_t flags)
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{
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const struct pwm_cc13xx_cc26xx_config *config = dev->config;
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if (channel != 0) {
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return -EIO;
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}
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set_period_and_pulse(config, period, pulse);
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return 0;
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}
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static int get_cycles_per_sec(const struct device *dev, uint32_t channel, uint64_t *cycles)
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{
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if (channel > 0) {
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return -EIO;
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}
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if (cycles) {
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*cycles = CPU_FREQ;
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}
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return 0;
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}
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static const struct pwm_driver_api pwm_driver_api = {
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.set_cycles = set_cycles,
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.get_cycles_per_sec = get_cycles_per_sec,
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};
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#ifdef CONFIG_PM
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static int get_timer_inst_number(const struct pwm_cc13xx_cc26xx_config *config)
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{
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switch (config->gpt_base) {
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case GPT0_BASE:
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return 0;
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case GPT1_BASE:
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return 1;
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case GPT2_BASE:
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return 2;
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case GPT3_BASE:
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return 3;
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default:
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__ASSERT_UNREACHABLE;
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}
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}
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#else
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static int get_timer_peripheral(const struct pwm_cc13xx_cc26xx_config *config)
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{
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switch (config->gpt_base) {
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case GPT0_BASE:
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return PRCM_PERIPH_TIMER0;
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case GPT1_BASE:
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return PRCM_PERIPH_TIMER1;
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case GPT2_BASE:
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return PRCM_PERIPH_TIMER2;
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case GPT3_BASE:
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return PRCM_PERIPH_TIMER3;
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default:
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__ASSERT_UNREACHABLE;
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}
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}
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#endif /* CONFIG_PM */
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static int init_pwm(const struct device *dev)
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{
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const struct pwm_cc13xx_cc26xx_config *config = dev->config;
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pinctrl_soc_pin_t pin = config->pcfg->states[0].pins[0];
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int ret;
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#ifdef CONFIG_PM
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/* Set dependency on gpio resource to turn on power domains */
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Power_setDependency(get_timer_inst_number(config));
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#else
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/* Enable peripheral power domain. */
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PRCMPowerDomainOn(PRCM_DOMAIN_PERIPH);
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/* Enable GPIO peripheral. */
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PRCMPeripheralRunEnable(get_timer_peripheral(config));
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/* Load PRCM settings. */
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PRCMLoadSet();
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while (!PRCMLoadGet()) {
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continue;
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}
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#endif /* CONFIG_PM */
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ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (ret < 0) {
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LOG_ERR("failed to setup PWM pinctrl");
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return ret;
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}
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/* Configures the PWM idle output level.
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*
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* TODO: Make PWM idle high/low configurable via custom DT PWM flag.
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*/
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GPIO_writeDio(pin.pin, 0);
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GPIO_setOutputEnableDio(pin.pin, GPIO_OUTPUT_ENABLE);
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/* Peripheral should not be accessed until power domain is on. */
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while (PRCMPowerDomainsAllOn(PRCM_DOMAIN_PERIPH) != PRCM_DOMAIN_POWER_ON) {
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continue;
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}
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TimerDisable(config->gpt_base, TIMER_B);
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HWREG(config->gpt_base + GPT_O_CFG) = GPT_CFG_CFG_16BIT_TIMER;
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/* Stall timer when debugging.
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*
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* TODO: Make debug stall configurable via custom DT prop.
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*/
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HWREG(config->gpt_base + GPT_O_CTL) |= GPT_CTL_TBSTALL;
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/* TODO: Make PWM polarity configurable via DT PWM flag. */
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HWREG(config->gpt_base + GPT_O_TBMR) = GPT_TBMR_TBAMS_PWM | GPT_TBMR_TBMRSU_TOUPDATE |
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GPT_TBMR_TBPWMIE_EN | GPT_TBMR_TBMR_PERIODIC;
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set_period_and_pulse(config, PWM_INITIAL_PERIOD, PWM_INITIAL_DUTY);
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return 0;
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}
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#define DT_TIMER(idx) DT_INST_PARENT(idx)
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#define DT_TIMER_BASE_ADDR(idx) (DT_REG_ADDR(DT_TIMER(idx)))
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#define PWM_DEVICE_INIT(idx) \
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PINCTRL_DT_INST_DEFINE(idx); \
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LOG_INSTANCE_REGISTER(LOG_MODULE_NAME, idx, CONFIG_PWM_LOG_LEVEL); \
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static const struct pwm_cc13xx_cc26xx_config pwm_cc13xx_cc26xx_##idx##_config = { \
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.gpt_base = DT_TIMER_BASE_ADDR(idx), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
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LOG_INSTANCE_PTR_INIT(log, LOG_MODULE_NAME, idx)}; \
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\
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static struct pwm_cc13xx_cc26xx_data pwm_cc13xx_cc26xx_##idx##_data; \
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\
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DEVICE_DT_INST_DEFINE(idx, init_pwm, NULL, &pwm_cc13xx_cc26xx_##idx##_data, \
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&pwm_cc13xx_cc26xx_##idx##_config, POST_KERNEL, \
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CONFIG_PWM_INIT_PRIORITY, &pwm_driver_api)
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DT_INST_FOREACH_STATUS_OKAY(PWM_DEVICE_INIT);
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