181 lines
4.2 KiB
C
181 lines
4.2 KiB
C
/*
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* Copyright (c) 2016 Open-RnD Sp. z o.o.
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* Copyright (c) 2017 RnDity Sp. z o.o.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <watchdog.h>
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#include <soc.h>
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#include <errno.h>
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#include <assert.h>
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#include "iwdg_stm32.h"
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/* Minimal timeout in microseconds. */
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#define IWDG_TIMEOUT_MIN 100
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/* Maximal timeout in microseconds. */
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#define IWDG_TIMEOUT_MAX 26214400
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#define IS_IWDG_TIMEOUT(__TIMEOUT__) \
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(((__TIMEOUT__) >= IWDG_TIMEOUT_MIN) && \
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((__TIMEOUT__) <= IWDG_TIMEOUT_MAX))
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/*
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* Status register need 5 RC LSI divided by prescaler clock to be updated.
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* With higher prescaler (256U), and according to HSI variation,
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* we need to wait at least 6 cycles so 48 ms.
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*/
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#define IWDG_DEFAULT_TIMEOUT 48u
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/**
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* @brief Calculates prescaler & reload values.
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*
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* @param timeout Timeout value in microseconds.
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* @param prescaler Pointer to prescaler value.
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* @param reload Pointer to reload value.
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*/
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static void iwdg_stm32_convert_timeout(u32_t timeout,
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u32_t *prescaler,
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u32_t *reload)
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{
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assert(IS_IWDG_TIMEOUT(timeout));
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u16_t divider = 0;
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u8_t shift = 0;
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/* Convert timeout to seconds. */
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float m_timeout = (float)timeout / 1000000 * LSI_VALUE;
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do {
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divider = 4 << shift;
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shift++;
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} while ((m_timeout / divider) > 0xFFF);
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/*
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* Value of the 'shift' variable corresponds to the
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* defines of LL_IWDG_PRESCALER_XX type.
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*/
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*prescaler = --shift;
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*reload = (u32_t)(m_timeout / divider) - 1;
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}
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static void iwdg_stm32_enable(struct device *dev)
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{
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IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev);
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LL_IWDG_Enable(iwdg);
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}
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static int iwdg_stm32_disable(struct device *dev)
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{
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/* watchdog cannot be stopped once started */
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ARG_UNUSED(dev);
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return 0;
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}
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static int iwdg_stm32_set_config(struct device *dev,
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struct wdt_config *config)
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{
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IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev);
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u32_t timeout = config->timeout;
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u32_t prescaler = 0;
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u32_t reload = 0;
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u32_t tickstart;
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assert(IS_IWDG_TIMEOUT(timeout));
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iwdg_stm32_convert_timeout(timeout, &prescaler, &reload);
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assert(IS_IWDG_PRESCALER(prescaler));
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assert(IS_IWDG_RELOAD(reload));
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LL_IWDG_EnableWriteAccess(iwdg);
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LL_IWDG_SetPrescaler(iwdg, prescaler);
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LL_IWDG_SetReloadCounter(iwdg, reload);
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#if defined(CONFIG_SOC_SERIES_STM32F3X) || defined(CONFIG_SOC_SERIES_STM32L4X)
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/* Neither STM32F1X nor STM32F4 series supports window option. */
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LL_IWDG_SetWindow(iwdg, 0x0FFF);
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#endif
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tickstart = k_uptime_get_32();
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while (LL_IWDG_IsReady(iwdg) == 0) {
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if ((k_uptime_get_32() - tickstart) > IWDG_DEFAULT_TIMEOUT) {
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return -ENODEV;
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}
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}
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LL_IWDG_ReloadCounter(iwdg);
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return 0;
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}
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static void iwdg_stm32_get_config(struct device *dev,
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struct wdt_config *config)
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{
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IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev);
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u32_t prescaler = LL_IWDG_GetPrescaler(iwdg);
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u32_t reload = LL_IWDG_GetReloadCounter(iwdg);
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/* Timeout given in microseconds. */
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config->timeout = (u32_t)((4 << prescaler) * (reload + 1)
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* (1000000 / LSI_VALUE));
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}
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static void iwdg_stm32_reload(struct device *dev)
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{
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IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev);
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LL_IWDG_ReloadCounter(iwdg);
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}
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static const struct wdt_driver_api iwdg_stm32_api = {
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.enable = iwdg_stm32_enable,
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.disable = iwdg_stm32_disable,
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.get_config = iwdg_stm32_get_config,
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.set_config = iwdg_stm32_set_config,
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.reload = iwdg_stm32_reload,
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};
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static int iwdg_stm32_init(struct device *dev)
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{
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struct wdt_config config;
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#ifdef CONFIG_IWDG_STM32_START_AT_BOOT
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IWDG_TypeDef *iwdg = IWDG_STM32_STRUCT(dev);
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LL_IWDG_Enable(iwdg);
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#endif /* CONFIG_IWDG_STM32_START_AT_BOOT */
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config.timeout = CONFIG_IWDG_STM32_TIMEOUT;
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iwdg_stm32_set_config(dev, &config);
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/*
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* The ST production value for the option bytes where WDG_SW bit is
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* present is 0x00FF55AA, namely the Software watchdog mode is
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* enabled by default.
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* If the IWDG is started by either hardware option or software access,
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* the LSI oscillator is forced ON and cannot be disabled.
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*
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* t_IWDG(ms) = t_LSI(ms) x 4 x 2^(IWDG_PR[2:0]) x (IWDG_RLR[11:0] + 1)
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*/
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return 0;
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}
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static struct iwdg_stm32_data iwdg_stm32_dev_data = {
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.Instance = IWDG
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};
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DEVICE_AND_API_INIT(iwdg_stm32, CONFIG_WDT_0_NAME,
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iwdg_stm32_init, &iwdg_stm32_dev_data, NULL,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&iwdg_stm32_api);
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