62 lines
1.9 KiB
C
62 lines
1.9 KiB
C
/*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __RISCV32_MIV_SOC_H_
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#define __RISCV32_MIV_SOC_H_
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#include <soc_common.h>
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#include <devicetree.h>
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/* GPIO Interrupts */
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#define MIV_GPIO_0_IRQ (0)
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#define MIV_GPIO_1_IRQ (1)
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#define MIV_GPIO_2_IRQ (2)
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#define MIV_GPIO_3_IRQ (3)
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#define MIV_GPIO_4_IRQ (4)
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#define MIV_GPIO_5_IRQ (5)
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#define MIV_GPIO_6_IRQ (6)
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#define MIV_GPIO_7_IRQ (7)
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#define MIV_GPIO_8_IRQ (8)
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#define MIV_GPIO_9_IRQ (9)
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#define MIV_GPIO_10_IRQ (10)
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#define MIV_GPIO_11_IRQ (11)
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#define MIV_GPIO_12_IRQ (12)
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#define MIV_GPIO_13_IRQ (13)
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#define MIV_GPIO_14_IRQ (14)
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#define MIV_GPIO_15_IRQ (15)
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#define MIV_GPIO_16_IRQ (16)
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#define MIV_GPIO_17_IRQ (17)
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#define MIV_GPIO_18_IRQ (18)
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#define MIV_GPIO_19_IRQ (19)
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#define MIV_GPIO_20_IRQ (20)
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#define MIV_GPIO_21_IRQ (21)
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#define MIV_GPIO_22_IRQ (22)
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#define MIV_GPIO_23_IRQ (23)
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#define MIV_GPIO_24_IRQ (24)
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#define MIV_GPIO_25_IRQ (25)
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#define MIV_GPIO_26_IRQ (26)
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#define MIV_GPIO_27_IRQ (27)
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#define MIV_GPIO_28_IRQ (28)
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#define MIV_GPIO_29_IRQ (29)
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#define MIV_GPIO_30_IRQ (30)
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#define MIV_GPIO_31_IRQ (31)
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/* UART Configuration */
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#define MIV_UART_0_LINECFG 0x1
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/* GPIO Configuration */
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#define MIV_GPIO_0_BASE_ADDR 0x70002000
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/* Clock controller. */
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#define PRCI_BASE_ADDR 0x44000000
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/* Timer configuration */
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#define RISCV_MTIME_BASE 0x4400bff8
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#define RISCV_MTIMECMP_BASE 0x44004000
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/* lib-c hooks required RAM defined variables */
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#define RISCV_RAM_BASE CONFIG_SRAM_BASE_ADDRESS
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#define RISCV_RAM_SIZE KB(CONFIG_SRAM_SIZE)
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#endif /* __RISCV32_MIV_SOC_H_ */
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