Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include ... Change automated searching for files using "IRQ_CONNECT()" API not including <zephyr/irq.h>. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>		2022-10-17 22:57:39 +09:00
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include	arch: xtensa: core: include: Update header to use guard macros	2022-07-20 13:39:23 -05:00
offsets	…
startup	soc/intel_adsp: Unify Xtensa CPU reset between cores	2021-12-14 18:43:05 -06:00
CMakeLists.txt	arch/xtensa: Add CCOUNT-based timing API	2022-06-07 19:04:42 +02:00
README-WINDOWS.rst	…
coredump.c	debug: coredump: add xtensa intel adsp, support toolchains	2022-06-23 15:44:45 -04:00
cpu_idle.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
crt1.S	…
debug_helpers_asm.S	…
fatal.c	debug: coredump: add xtensa intel adsp, support toolchains	2022-06-23 15:44:45 -04:00
gdbstub.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
gen_zsr.py	arch/xtensa: Rework irq_offload: automatic config, SMP-safe	2022-02-21 22:10:03 -05:00
irq_manage.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
irq_offload.c	include: add missing zephyr/irq.h include	2022-10-17 22:57:39 +09:00
timing.c	includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>	2022-09-05 16:31:47 +02:00
tls.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
window_vectors.S	arch/xtensa: Use ZSR assignments for the alloca exception	2022-01-20 12:58:00 -05:00
xcc_stubs.c	arch: migrate includes to <zephyr/...>	2022-05-06 19:57:22 +02:00
xtensa-asm2-util.S	arch: xtensa: implement ARCH_EXCEPT	2022-06-23 15:44:45 -04:00
xtensa-asm2.c	arch: xtensa: implement ARCH_EXCEPT	2022-06-23 15:44:45 -04:00
xtensa_backtrace.c	xtensa: use lower-case hex in backtrace output	2022-09-09 14:09:33 -05:00
xtensa_intgen.py	include: add zephyr/ on script generated #include	2022-05-27 15:20:27 -07:00
xtensa_intgen.tmpl	…