zephyr/arch/riscv32
Andrew Boie 5dcb279df8 debug: add stack sentinel feature
This places a sentinel value at the lowest 4 bytes of a stack
memory region and checks it at various intervals, including when
servicing interrupts or context switching.

This is implemented on all arches except ARC, which supports stack
bounds checking directly in hardware.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
..
core debug: add stack sentinel feature 2017-05-13 15:14:41 -04:00
include kernel: expose struct k_thread implementation 2017-04-26 16:29:06 +00:00
soc arch: convert to using newly introduced integer sized types 2017-04-21 12:08:12 +00:00
Kbuild riscv32: added the riscv-privilege SOC_FAMILY 2017-03-20 23:19:35 +00:00
Kconfig riscv32: enable gen_isr_tables mechanism 2017-02-15 04:49:17 +00:00
Makefile riscv32: added the riscv-privilege SOC_FAMILY 2017-03-20 23:19:35 +00:00
defconfig arch: added support for the riscv32 architecture 2017-01-13 19:52:23 +00:00