zephyr/soc/espressif
Marcio Ribeiro baf62b7a98 soc: esp32: XIP removed from Espressif targets
The way ESP32 XIP works (with MMU and cache) does no fit the way Zephyr XIP
is implemented, causing issues related to included Zephyr linker files.
Flash code still resides in flash for execution, but MMU/Cache handles it
in such way that XIP might not (or should not) be used with current Zephyr
approach. To address this problem, XIP configuration option is being
removed from Espressif targets.

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
2024-08-31 06:47:52 -04:00
..
common soc: espressif: psram as shared multi heap 2024-08-27 18:37:47 -04:00
esp32 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
esp32c2 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
esp32c3 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
esp32c6 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
esp32s2 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
esp32s3 soc: esp32: XIP removed from Espressif targets 2024-08-31 06:47:52 -04:00
CMakeLists.txt
Kconfig
Kconfig.defconfig
Kconfig.soc
Kconfig.sysbuild soc: espressif: Add default MCUboot mode to sysbuild 2024-08-12 15:14:45 +02:00
soc.yml soc: esp32c2: Add support to ESP32C2 and ESP8684 2024-08-16 14:08:22 -04:00