575 lines
13 KiB
Plaintext
575 lines
13 KiB
Plaintext
/*
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* Copyright (c) 2019 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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#include <nordic/nrf_common.dtsi>
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#include <zephyr/dt-bindings/regulator/nrf5x.h>
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/ {
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chosen {
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zephyr,bt-hci = &bt_hci_controller;
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zephyr,entropy = &rng;
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zephyr,flash-controller = &flash_controller;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m4f";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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itm: itm@e0000000 {
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compatible = "arm,armv7m-itm";
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reg = <0xe0000000 0x1000>;
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swo-ref-frequency = <32000000>;
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};
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};
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};
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soc {
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ficr: ficr@10000000 {
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compatible = "nordic,nrf-ficr";
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reg = <0x10000000 0x1000>;
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#nordic,ficr-cells = <1>;
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status = "okay";
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};
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uicr: uicr@10001000 {
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compatible = "nordic,nrf-uicr";
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reg = <0x10001000 0x1000>;
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status = "okay";
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};
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sram0: memory@20000000 {
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compatible = "mmio-sram";
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};
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clock: clock@40000000 {
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compatible = "nordic,nrf-clock";
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reg = <0x40000000 0x1000>;
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interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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power: power@40000000 {
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compatible = "nordic,nrf-power";
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reg = <0x40000000 0x1000>;
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interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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gpregret1: gpregret1@4000051c {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "nordic,nrf-gpregret";
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reg = <0x4000051c 0x1>;
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status = "okay";
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};
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gpregret2: gpregret2@40000520 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "nordic,nrf-gpregret";
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reg = <0x40000520 0x1>;
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status = "okay";
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};
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reg1: regulator@40000578 {
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compatible = "nordic,nrf5x-regulator";
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reg = <0x40000578 0x1>;
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regulator-name = "REG1";
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regulator-initial-mode = <NRF5X_REG_MODE_LDO>;
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};
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reg0: regulator@40000580 {
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compatible = "nordic,nrf52x-regulator-hv";
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reg = <0x40000580 0x1>;
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regulator-name = "REG0";
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status = "disabled";
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};
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};
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radio: radio@40001000 {
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compatible = "nordic,nrf-radio";
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reg = <0x40001000 0x1000>;
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interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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dfe-supported;
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ieee802154-supported;
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ble-2mbps-supported;
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ble-coded-phy-supported;
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tx-high-power-supported;
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ieee802154: ieee802154 {
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compatible = "nordic,nrf-ieee802154";
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status = "disabled";
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};
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/* Note: In the nRF Connect SDK the SoftDevice Controller
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* is added and set as the default Bluetooth Controller.
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*/
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bt_hci_controller: bt_hci_controller {
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compatible = "zephyr,bt-hci-ll-sw-split";
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status = "okay";
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};
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};
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uart0: uart@40002000 {
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/* uart can be either UART or UARTE, for the user to pick */
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/* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */
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compatible = "nordic,nrf-uarte";
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reg = <0x40002000 0x1000>;
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interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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i2c0: i2c@40003000 {
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/*
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* This i2c node can be TWI, TWIM, or TWIS,
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* for the user to pick:
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* compatible = "nordic,nrf-twi" or
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* "nordic,nrf-twim" or
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* "nordic,nrf-twis".
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*/
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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};
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spi0: spi@40003000 {
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/*
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* This spi node can be SPI, SPIM, or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spi" or
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* "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003000 0x1000>;
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interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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};
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i2c1: i2c@40004000 {
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/*
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* This i2c node can be TWI, TWIM, or TWIS,
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* for the user to pick:
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* compatible = "nordic,nrf-twi" or
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* "nordic,nrf-twim" or
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* "nordic,nrf-twis".
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*/
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compatible = "nordic,nrf-twim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40004000 0x1000>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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};
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spi1: spi@40004000 {
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/*
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* This spi node can be SPI, SPIM, or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spi" or
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* "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40004000 0x1000>;
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interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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};
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nfct: nfct@40005000 {
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compatible = "nordic,nrf-nfct";
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reg = <0x40005000 0x1000>;
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interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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gpiote: gpiote0: gpiote@40006000 {
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compatible = "nordic,nrf-gpiote";
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reg = <0x40006000 0x1000>;
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interrupts = <6 5>;
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status = "disabled";
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instance = <0>;
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};
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adc: adc@40007000 {
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compatible = "nordic,nrf-saadc";
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reg = <0x40007000 0x1000>;
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interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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timer0: timer@40008000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x40008000 0x1000>;
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cc-num = <4>;
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max-bit-width = <32>;
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interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer1: timer@40009000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x40009000 0x1000>;
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cc-num = <4>;
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max-bit-width = <32>;
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interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer2: timer@4000a000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x4000a000 0x1000>;
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cc-num = <4>;
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max-bit-width = <32>;
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interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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rtc0: rtc@4000b000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x4000b000 0x1000>;
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cc-num = <3>;
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interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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clock-frequency = <32768>;
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prescaler = <1>;
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};
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temp: temp@4000c000 {
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compatible = "nordic,nrf-temp";
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reg = <0x4000c000 0x1000>;
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interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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rng: random@4000d000 {
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compatible = "nordic,nrf-rng";
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reg = <0x4000d000 0x1000>;
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interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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ecb: ecb@4000e000 {
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compatible = "nordic,nrf-ecb";
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reg = <0x4000e000 0x1000>;
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interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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ccm: ccm@4000f000 {
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compatible = "nordic,nrf-ccm";
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reg = <0x4000f000 0x1000>;
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interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>;
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length-field-length-8-bits;
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headermask-supported;
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status = "okay";
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};
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wdt: wdt0: watchdog@40010000 {
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compatible = "nordic,nrf-wdt";
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reg = <0x40010000 0x1000>;
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interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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rtc1: rtc@40011000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x40011000 0x1000>;
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cc-num = <4>;
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interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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clock-frequency = <32768>;
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prescaler = <1>;
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};
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qdec: qdec0: qdec@40012000 {
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compatible = "nordic,nrf-qdec";
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reg = <0x40012000 0x1000>;
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interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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comp: comparator@40013000 {
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/*
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* This comparator node can be COMP or LPCOMP,
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* for the user to pick:
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* compatible = "nordic,nrf-comp" or
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* "nordic,nrf-lpcomp".
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*/
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compatible = "nordic,nrf-comp";
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reg = <0x40013000 0x1000>;
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interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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egu0: swi0: egu@40014000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40014000 0x1000>;
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interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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egu1: swi1: egu@40015000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40015000 0x1000>;
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interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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egu2: swi2: egu@40016000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40016000 0x1000>;
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interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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egu3: swi3: egu@40017000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40017000 0x1000>;
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interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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egu4: swi4: egu@40018000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40018000 0x1000>;
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interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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egu5: swi5: egu@40019000 {
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compatible = "nordic,nrf-egu", "nordic,nrf-swi";
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reg = <0x40019000 0x1000>;
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interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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};
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timer3: timer@4001a000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x4001a000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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timer4: timer@4001b000 {
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compatible = "nordic,nrf-timer";
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status = "disabled";
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reg = <0x4001b000 0x1000>;
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cc-num = <6>;
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max-bit-width = <32>;
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interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>;
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prescaler = <0>;
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};
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pwm0: pwm@4001c000 {
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compatible = "nordic,nrf-pwm";
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reg = <0x4001c000 0x1000>;
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interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pdm0: pdm@4001d000 {
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compatible = "nordic,nrf-pdm";
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reg = <0x4001d000 0x1000>;
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interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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acl: acl@4001e000 {
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compatible = "nordic,nrf-acl";
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reg = <0x4001e000 0x1000>;
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status = "okay";
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};
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flash_controller: flash-controller@4001e000 {
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compatible = "nordic,nrf52-flash-controller";
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reg = <0x4001e000 0x1000>;
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partial-erase;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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erase-block-size = <4096>;
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write-block-size = <4>;
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};
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};
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ppi: ppi@4001f000 {
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compatible = "nordic,nrf-ppi";
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reg = <0x4001f000 0x1000>;
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status = "okay";
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};
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mwu: mwu@40020000 {
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compatible = "nordic,nrf-mwu";
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reg = <0x40020000 0x1000>;
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status = "okay";
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};
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pwm1: pwm@40021000 {
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compatible = "nordic,nrf-pwm";
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reg = <0x40021000 0x1000>;
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interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm2: pwm@40022000 {
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compatible = "nordic,nrf-pwm";
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reg = <0x40022000 0x1000>;
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interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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spi2: spi@40023000 {
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/*
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* This spi node can be SPI, SPIM, or SPIS,
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* for the user to pick:
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* compatible = "nordic,nrf-spi" or
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* "nordic,nrf-spim" or
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* "nordic,nrf-spis".
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*/
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compatible = "nordic,nrf-spim";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40023000 0x1000>;
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interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>;
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max-frequency = <DT_FREQ_M(8)>;
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easydma-maxcnt-bits = <16>;
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status = "disabled";
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};
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rtc2: rtc@40024000 {
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compatible = "nordic,nrf-rtc";
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reg = <0x40024000 0x1000>;
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cc-num = <4>;
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interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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clock-frequency = <32768>;
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prescaler = <1>;
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};
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i2s0: i2s@40025000 {
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compatible = "nordic,nrf-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40025000 0x1000>;
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interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "disabled";
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};
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usbd: usbd@40027000 {
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compatible = "nordic,nrf-usbd";
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reg = <0x40027000 0x1000>;
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interrupts = <39 NRF_DEFAULT_IRQ_PRIORITY>;
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num-bidir-endpoints = <1>;
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num-in-endpoints = <7>;
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num-out-endpoints = <7>;
|
|
num-isoin-endpoints = <1>;
|
|
num-isoout-endpoints = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: uart@40028000 {
|
|
compatible = "nordic,nrf-uarte";
|
|
reg = <0x40028000 0x1000>;
|
|
interrupts = <40 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm3: pwm@4002d000 {
|
|
compatible = "nordic,nrf-pwm";
|
|
reg = <0x4002d000 0x1000>;
|
|
interrupts = <45 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
status = "disabled";
|
|
#pwm-cells = <3>;
|
|
};
|
|
|
|
spi3: spi@4002f000 {
|
|
compatible = "nordic,nrf-spim";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x4002f000 0x1000>;
|
|
interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>;
|
|
max-frequency = <DT_FREQ_M(32)>;
|
|
easydma-maxcnt-bits = <16>;
|
|
rx-delay-supported;
|
|
rx-delay = <2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
gpio0: gpio@50000000 {
|
|
compatible = "nordic,nrf-gpio";
|
|
gpio-controller;
|
|
reg = <0x50000000 0x200
|
|
0x50000500 0x300>;
|
|
#gpio-cells = <2>;
|
|
status = "disabled";
|
|
port = <0>;
|
|
gpiote-instance = <&gpiote>;
|
|
};
|
|
|
|
gpio1: gpio@50000300 {
|
|
compatible = "nordic,nrf-gpio";
|
|
gpio-controller;
|
|
reg = <0x50000300 0x200
|
|
0x50000800 0x300>;
|
|
#gpio-cells = <2>;
|
|
ngpios = <10>;
|
|
status = "disabled";
|
|
port = <1>;
|
|
gpiote-instance = <&gpiote>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&nvic {
|
|
arm,num-irq-priority-bits = <3>;
|
|
};
|
|
|
|
&systick {
|
|
/* Use RTC for system clock, instead of SysTick. */
|
|
status = "disabled";
|
|
};
|