zephyr/arch/xtensa/core
Daniel Leung cdb9166b81 cmake: toolchain/xcc,xt-clang: env vars for multiple cores
To use Xtensa toolchain, various environment variables must be
set so the executables can find necessary files and what core
to compile for. This becomes an annoyance when you have to
test multiple boards with different cores. You have to use
one set of environment variables per core. Twister cannot test
them all in one setting, and it is especially annoying doing
west builds. So enhance the environment variables handling so
that TOOLCHAIN_VER and XTENSA_CORE can be replaced by
TOOLCHAIN_VAR_<board> and XTENSA_CORE_<board> where <board>
is the normalized board target (think <board>.yaml). CMake
will then figure out the core ID for the toolchain to use.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2024-10-31 09:26:00 -05:00
..
offsets
startup arch: xtensa: rename processor state save and restore calls 2024-10-29 07:07:42 -05:00
CMakeLists.txt cmake: toolchain/xcc,xt-clang: env vars for multiple cores 2024-10-31 09:26:00 -05:00
README_MMU.txt
README_WINDOWS.rst
coredump.c
cpu_idle.c
crt1.S
debug_helpers_asm.S
elf.c llext: xtensa: fix relocations with multiple SLOT0_OP 2024-10-17 10:49:50 -04:00
fatal.c
gdbstub.c
gen_vectors.py
gen_zsr.py
irq_manage.c
irq_offload.c
mem_manage.c
mmu.c
mpu.c
prep_c.c
ptables.c
smp.c
syscall_helper.c
thread.c
timing.c
tls.c
userspace.S
vector_handlers.c
window_vectors.S
xcc_stubs.c
xtensa_asm2_util.S
xtensa_backtrace.c
xtensa_hifi.S
xtensa_intgen.py
xtensa_intgen.tmpl