Francois Ramu e133ebfe2e drivers: sdmmc: stm32 enables HSI48 MHz clock by default ... For some stm32 devices, the SDMMC clock selection is HSI 48MHz by default (reset value). It must be enabled before acccessing the peripheral. The ErrorCode is reported when Init fails. Signed-off-by: Francois Ramu <francois.ramu@st.com>		2022-09-07 15:35:10 +02:00
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CMakeLists.txt	drivers: disk: remove legacy SDMMC SPI driver	2022-04-29 14:21:36 -05:00
Kconfig	…
Kconfig.flash	…
Kconfig.ram	…
Kconfig.sdmmc	drivers: disk: sdmmc: Update Kconfig	2022-09-01 10:26:19 +02:00
flashdisk.c	drivers: migrate includes to <zephyr/...>	2022-05-06 19:58:21 +02:00
ramdisk.c	drivers: migrate includes to <zephyr/...>	2022-05-06 19:58:21 +02:00
sdmmc_sdhc.h	drivers: migrate includes to <zephyr/...>	2022-05-06 19:58:21 +02:00
sdmmc_stm32.c	drivers: sdmmc: stm32 enables HSI48 MHz clock by default	2022-09-07 15:35:10 +02:00
sdmmc_subsys.c	…