Gerard Marull-Paretas 014d831d80 soc: arm/riscv: gigadevice: enable reset controller by default ... Similar to pinctrl, almost all device drivers will depend on the reset controller being available, so default the driver class to y at SoC level. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>		2022-08-29 10:30:49 +02:00
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arc	ARC: boards: QEMU: hs6x: minor description polish	2022-08-22 10:23:14 +00:00
arm	soc: arm/riscv: gigadevice: enable reset controller by default	2022-08-29 10:30:49 +02:00
arm64	soc/arm64: Do not allow userspace to directly access peripherals	2022-08-05 06:28:57 +01:00
mips	…
nios2	…
posix	cmake: Update CONFIG_ASAN support	2022-08-19 08:30:01 +02:00
riscv	soc: arm/riscv: gigadevice: enable reset controller by default	2022-08-29 10:30:49 +02:00
sparc	…
x86	i2c: Remove unncessary HAS_I2C_DW Kconfig symbol	2022-08-01 18:01:44 +02:00
xtensa	logging: adsp hda backend improvements	2022-08-26 21:33:10 -04:00
Kconfig	…